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PollEx User Guides
Discover PollEx functionality with comprehensive user guides.
Verification User Guides
This section contains the user guides for the following tools: DFA, DFE, DFE+, DFM, and Logic DFE.
DFM
PollEx DFM is a board level manufacturability checking software.
Check Item Category
Board
Label Box
Check the label box existence or size.

Welcome
What's New
View new features for PollEx 2024.1.
Get Started
Learn the basics and discover the workspace.
PollEx Tutorials
Discover PollEx functionality with interactive tutorials.
PollEx User Guides
Discover PollEx functionality with comprehensive user guides.
- Manufacture User Guides
  This section contains the user guides for the following tools: Block JIG Generator, Compare GDSII, Gerber to PCB, Make Board Paneling, Metal Mask Manager, Mounting Data Extractor, Mounting Emulator, Router-Machine JIG Generator, Solder Quantity Calculator, Soldering Pallet, Test Point Location Generator, and Underfill.
- Modeler User Guides
  This section contains the user guides for the following tools: BOM, CAM, Component Arrangement Plan, CP, Golden Sample, Logic, PCB, Redmark+, and Worksheet Planner.
- Solver User Guides
  This section contains the user guides for the following tools: PI, SI, SI Explorer, and Thermal.
- Verification User Guides
  This section contains the user guides for the following tools: DFA, DFE, DFE+, DFM, and Logic DFE.
  - DFA
    PollEx DFA is an assembly status checking toolset for PCB design based on 3D package library.
  - DFE
  - DFE+
    PollEx DFE+ is a fully automated SI analysis tool.
  - DFM
    PollEx DFM is a board level manufacturability checking software.
    - Start DFM
      From the menu bar, click Option > DFM > Input after reading the design file to make a DFM input file.
    - Component Classification
    - Check Item Category
      - Board
        Array Board Size Check
        Check an item for the panel board size to see if the size is standard. Follow the instructions to set checking parameters.
        Board Spacing
        Analyze clearances between the contour of the array board and the sub-boards.
        Board Origin Offset
        Check the design boards origin points.
        Cutting Region
        Check the cutting holes design rule, location, and clearance to other objects.
        Data Existence
        Verify the certain layers existence and data existence on the layer.
        Dummy PCB
        Verify the copper existence in the dummy area of an arrayed board.
        Fiducial Mark
        Verify that fiducial marks are designed correctly on the paneling board.
        Guide Hole
        Validate the guiding hole in the PCB's design.
        Guide Line
        Check item for the soldering guide line width and the drawing layers clearance with other geometries or objects.
        Jig Hole
        Detect the JIG hole that drives in Jig machine.
        Label Box
        Check the label box existence or size.
        Layer Stack-up
        Check the Board, Copper, Dielectric, Solder Mask Thickness.
        Min Silk Width
        If silkscreen data is drawn with a thin width, it’s difficult to recognize it.
        Missing Hole
        Often, Missing Hole is also referred to as Cutting Region.
        PCB Mark
        Recognize a single board by machinery and check the rules about PCB marks.
        PCB Outline Sharp Angle
        Analyze the sharpness of the PCB outline.
        PCB Outline Spacing
        Verify the clearance between a single board outline and various objects.
        PCB Outline Width
        Check the width of the PCB outline.
        Routing Slit
        Check the rule for the routing slit on the PCB design.
        Solder Mark Violation
        Verify the solder mask is in the PCB design and if it overlaps with routing patterns.
        SMT Direction Mark
        SMT direction marks placement checking item on special layer.
        Sub Board Misarrangement
        Check if single boards have the same distance to panel or have placing type.
        Sub Board Placement
        Check the sub-boards placement order and soldering direction.
        V-Cut
        Check the V-Cut and its region in the panel board.
      - Component
      - Drill Size
      - Etc.
      - FPCB
        FPCB is excellent for development of electronic components as electronic appliances are becoming miniaturized and lightweight.
      - Ground Wall
        Check the clearance for an area affected by ground wall.
      - Package
      - PAD
      - Pattern
      - Placement
      - Test Point
        Verify if the clearance between test points and other objects follow specifications and if the test points contain text.
      - Test Point2
        Analyze the clearance between a test point and each component on a board.
      - Tooling
      - Underfill
        Find and examine underfill areas in BGA-type components.
    - Result
    - Lock Input Setup
      Lock the DFM input rule file (*.DFMI) to prevent any modifications from others.
  - Logic DFE
    PollEx Logic DFE is a toolset that checks electrical validity and standardizing of schematic design.
  - Technical Cleanliness
    PollEx Technical Cleanliness (TC) is an optional module of the PollEx PCB and a reliability analysis tool set for hazardous areas on a PCB design, using its micro particles.
- UPE User Guides
  This section contains the PollEx UPE user guide.
PollEx Installation Guide
Instruction to install PollEx 2024.1.
Character String Search Rule
Definition for meta character using in making sentence for searching option.

Label Box

Check the label box existence or size.

The Label Box dialog contains the following sections:

Label Box Definition: Select a checking target layer that has a label (silkscreen or another layer).
- Label Box Layer Setting: Set the label box searching layers for the top and bottom.
- Component Group: If the label box is registered with components, specify component group.
- Board Figure: If the label boxes are drawn with figure geometries, specify the size of the label box with width and height.
Label Area Definition: Recognizes an empty area where no parts are placed as a Label Area.
- Area size: Set minimum Length/Width value to recognize Label Area.
  - Length: Length of the label area.
  - Width: Width of the label area.
- Filled with copper planes: Copper plane must exist to be recognized as a Label Area.
- Filled with Solder Mask(PSR): PSR must exist to be recognized as Label Area.
** Existence's Target Layer setting option is activated when Label Area Definition is selected.
Checking: Set the checking contents.
- Existence: Check that the defined label box is in PCB design.
  - Top: Check the Label Box/Area existence in Top Layer.
  - Bottom: Check the Label Box/Area existence in Bottom Layer.
  - Any: If at least one of the Top/Bottom Layers has a Label Box/Area,It is Pass.
  - All: If both Top and Bottom Layers have Lable Box/Area, It is Pass.
- Contents: Check the label box existence and if the given character strings are in the label box.
- Label Box Size: Check if the found label box is in the given size. Set the checking condition with the label box size, width, and height ranges.
  - Check object for Polygon Only: Use PollEx DFM to check the label box for only the polygon data.
  - Width/Height: Set the label box size using Floating Value Input tool.
- Clearance from Components on Same Layer: Check the clearance between the label box and a certain component group on the same layer.
  - Component
  - Clearance
  - Include Checking for Components on the Other Side: When checking the clearance with components, include components placed on the other side.