Copper Boundary Width
Checks the outline width of copper-pour data.
- Checking
- Detect Outline Width Zero Copper-Pour: Find copper-pours with an outline width size of 0.
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Discover PollEx functionality with interactive tutorials.
Discover PollEx functionality with comprehensive user guides.
This section contains the user guides for the following tools: Block JIG Generator, Compare GDSII, Gerber to PCB, Make Board Paneling, Metal Mask Manager, Mounting Data Extractor, Mounting Emulator, Router-Machine JIG Generator, Solder Quantity Calculator, Soldering Pallet, Test Point Location Generator, and Underfill.
This section contains the user guides for the following tools: BOM, CAM, Component Arrangement Plan, CP, Golden Sample, Logic, PCB, Redmark+, and Worksheet Planner.
This section contains the user guides for the following tools: PI, SI, SI Explorer, and Thermal.
This section contains the user guides for the following tools: DFA, DFE, DFE+, DFM, and Logic DFE.
PollEx DFA is an assembly status checking toolset for PCB design based on 3D package library.
PollEx DFE+ is a fully automated SI analysis tool.
PollEx DFM is a board level manufacturability checking software.
From the menu bar, click Option > DFM > DFM Input after reading the design file to make a DFM input file.
FPCB is excellent for development of electronic components as electronic appliances are becoming miniaturized and lightweight.
Check the clearance for an area affected by ground wall.
Scan the Net List on PCB data and detect the net which is connected to only 1 pin.
This section examines whether the ratio of the connection of pad and pattern is outside the defined value.
Check the pattern opposite routed directions.
Checks the outline width of copper-pour data.
In almost cases, pattern connected to pin should be thicker than a certain width and should keep its thickness within a certain distance.
Check the thickness which deviates from the pad edge.
Check routing status from certain components.
Check an electrical short of different routing patterns.
Check the number of patterns, the distance between pins, and the distance between pin and patterns.
Check the pattern minimum width.
Check the clearance between net to net.
Wiring designed by Artwork mode is recognized as objects and not nets, but it is required to keep the clearance between object to object.
Check a component pin clearance with various objects on design.
In the case of a PCB design designed to use silver paste, it can be checked with the related design rule here.
This item can detect the dangling net and check the connected net to see if the net is completely connected to pin or not.
Check the void coverage with hole placed to copper plane.
Verify if the clearance between test points and other objects follow specifications and if the test points contain text.
Analyze the clearance between a test point and each component on a board.
Find and examine underfill areas in BGA-type components.
Lock the DFM input rule file (*.DFMI) to prevent any modifications from others.
PollEx Logic DFE is a toolset that checks electrical validity and standardizing of schematic design.
This section contains the PollEx UPE user guide.
Definition for meta character using in making sentence for searching option.
Discover PollEx functionality with comprehensive user guides.
This section contains the user guides for the following tools: DFA, DFE, DFE+, DFM, and Logic DFE.
PollEx DFM is a board level manufacturability checking software.
Checks the outline width of copper-pour data.
Checks the outline width of copper-pour data.
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