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PollEx User Guides
Discover PollEx functionality with comprehensive user guides.
Verification User Guides
This section contains the user guides for the following tools: DFA, DFE, DFE+, DFM, and Logic DFE.
DFE
DFE Items
Power
Inductance
This DFE rule is to check the trace length from passive component to GND.

Welcome
What's New
View new features for PollEx 2025.1.
Get Started
Learn the basics and discover the workspace.
PollEx Tutorials
Discover PollEx functionality with interactive tutorials.
PollEx User Guides
Discover PollEx functionality with comprehensive user guides.
- Manufacture User Guides
  This section contains the user guides for the following tools: Block JIG Generator, Compare GDSII, Gerber to PCB, Make Board Paneling, Metal Mask Manager, Mounting Data Extractor, Mounting Emulator, Router-Machine JIG Generator, Solder Quantity Calculator, Soldering Pallet, Test Point Location Generator, and Underfill.
- Modeler User Guides
  This section contains the user guides for the following tools: BOM, CAM, Component Arrangement Plan, CP, Golden Sample, Logic, PCB, Redmark+, and Worksheet Planner.
- Solver User Guides
  This section contains the user guides for the following tools: PI, SI, SI Explorer, and Thermal.
- Verification User Guides
  This section contains the user guides for the following tools: DFA, DFE, DFE+, DFM, and Logic DFE.
  - DFA
    PollEx DFA is an assembly status checking toolset for PCB design based on 3D package library.
  - DFE
    - Input Setup
    - Object Group Setting
      Group the same type of objects into the same group.
    - DFE Items
      - High Speed
      - Differential Pair Net
      - Net
      - Power
        Antenna Ground
        Connected Via
        This item checks for the distance from a pin to via.
        Decap
        This rule checks for the number of capacitors per each PWR/GND pin to help the designer to determine the stability of IC component’s power supply. The rule also reports the distance between capacitor and IC components.
        Decap2
        This rule checks a design guide for decoupling capacitor usage.
        Electrical Conductor Spacing
        This feature allows precise inspection and verification of the spacing between electrical conductors on printed circuit boards (PCBs).
        Ground Coverage
        This item checks for via locations and via area coverage.
        Inductance
        This DFE rule is to check the trace length from passive component to GND.
        Power-Net to Net
        The rule checks whether two power traces have enough spaces.
        IPC Material
        Parallel Jumper
        This DFE rule is to check the required jumper count.
        Potential Difference
        This DFE rule is used to compare net clearance and capacitor voltage with a voltage standard table.
        Power-Width
        This DFE rule checks routed pattern trace widths compared to specified minimum and maximum widths.
        Stability Copper
        This DFE rule searches isolated copper patterns.
        Supplementary Pattern
        This DFE rule is to check that the total trace width meets the requirement if there is branch.
        Via Option
        This DFE rule is to check the number of power trace via.
      - Filter
      - Component
      - Board
    - DFE Environment
      View DFE Environment setting methods.
    - Result
  - DFE+
    PollEx DFE+ is a fully automated SI analysis tool.
  - DFM
    PollEx DFM is a board level manufacturability checking software.
  - Logic DFE
    PollEx Logic DFE is a toolset that checks electrical validity and standardizing of schematic design.
  - Technical Cleanliness
    PollEx Technical Cleanliness (TC) is an optional module of the PollEx PCB and a reliability analysis tool set for hazardous areas on a PCB design, using its micro particles.
- UPE User Guides
  This section contains the PollEx UPE user guide.
PollEx Installation Guide
Instruction to install PollEx 2025.1.

Inductance

This DFE rule is to check the trace length from passive component to GND.

The usage guide for decoupling capacitors is that they should be placed within certain distance from a certain component’s power pin and connecting should be shorter than the given length. Long routing length between component power pin and decoupling capacitor causes increase of inductance element and causes bad SSN noise.

Item: Enter item name.
POWER Net: Select a power net group that is connected to passive component.
GND Net: Select a ground net group that is connected to passive component.
Passive Comp: Select a target passive component group.
Start Comp: Select a target component group.
Length to Plane/Via: Assign trace length criteria between passive component pin and Ground.