PI Tutorial

1. Click File > Open.
2. Open the PollEx_PCB_Sample_r1.0.pdbb file from C:\ProgramData\altair\PollEx\<version>\Examples\PollEx_PCB_Sample_r1.0.pdbb.
3. Click File > Save As Project.
   The Save As Project dialog displays.
4. Enter a new project name and select the project folder to put in the design folder.
5. Click OK.
   The project directory is created under the design folder, and PollEx_PCB_Sample_r1.0.pdbb and related files are copied into the project directory. The Part directory is created.
6. Click File > Exit to close this design.

In this step, you will add a new dielectric material FR4.- and PSR3.0.

1. Click File > Open.
2. Open the Project Directory/PollEx_PCB_Sample_r1.0.pdbb file.
   You should open the .pdbb file in the project directory.
3. Click Properties > Material Library.
   The Materials dialog opens.
4. Add FR4.0.
   1. From the Materials dialog, click Add Dielectric.
      The Edit dialog opens.

      
      
      Figure 1.

   2. For Material name, enter FR4.0.
   3. For X, Y, and Z, enter 0.35.
   4. For Dielectric Constant, enter 4.0.
   5. For Loss Tangent, enter 0.02.

      
      
      Figure 2.

   6. Click OK to close the Edit dialog.
5. Add PSR3.0 for solder resist layer.
   1. From the Materials dialog, click Add Dielectric.
      The Edit dialog opens.
   2. For Material name, enter PSR3.0.
   3. For X, Y, and Z, enter 0.35.
   4. For Dielectric Constant, enter 3.0.
   5. For Loss Tangent, enter 0.02.

      
      
      Figure 3.

   6. Click OK to close the Edit dialog.
      The FR4.0 and PSR3.0 materials are registered as new materials.

      
      
      Figure 4.

   7. Click OK to close the Materials dialog.

1. Click Properties > Layer Stack.
   You can set the Layer Stack by referring to the PCB_stackup.xlsx file.
   The Layer Stack dialog opens.
2. Enter Thickness and Dielectric Material fields by referring to the values in the PCB_stackup.xlsx file.
3. Change the layer Type.

   
   
   Figure 5.

   1. Execute the Export menu to save current layer stack information.
      The Explorer dialog displays.
   2. Enter StandardStackup_PI.udls as the new stack-up file name.
   3. Click OK to close the Explorer dialog.
      Tip: You can import this layer stack information again by executing the Import menu.
4. Change Dielectric Constant.

   
   
   Figure 6.

   1. Click and select FR4.0.
      The dielectric constant for TOP layer changes from 4.5 to 4.0.
   2. Click and select FR4.0.
      The dielectric constant for Bottom layer changes from 4.5 to 4.0. 5.
5. Add Solder resist layer to the Top layer and Bottom Layer.
   1. Select Top layer and click Insert.
      The Add dialog displays.
   2. Select Coating as the Type.
   3. Select PSR3.0 for the Dielectric material.
   4. Enter 0.02 for the Thickness.

      
      
      Figure 7.

   5. Click OK to close the dialog.
      The new Solder Resist layer is inserted at the top.

      
      
      Figure 8.

   6. Select Bottom layer and click Add.
      The Add dialog opens.
   7. Select Coating for the Type.
   8. Select PSR3.0 for the Dielectric material.
   9. Enter 0.02 for Thickness.

      
      
      Figure 9.

   10. Click OK to close the dialog.
       The new Solder Resist layer is inserted at the bottom.

       
       
       Figure 10.

   11. Click Export to save this stack-up.
       The Explorer dialog opens.
   12. Enter StandardStackup_PSR as the new stack-up file name.
       You will use standard stackup for testing purposes.
   13. Click Import to load pre-saved layer stackup.
       The Explorer dialog opens.
   14. Find the directory path for your stack-up files in the navigation tree.
   15. Select StandardStackup_PI.udls and click Open to open this stack-up.

       
       
       Figure 11.

   16. Click OK to close the Layer Stack dialog.

In this step, you will assign an IBIS model to a DDR3 memory device.

1. Click Properties > Parts.
   The passive component RLC values are automatically extracted from PDBB data, if the value property was correctly assigned in the PDBB database.

   
   
   Figure 12.

   The Parts dialog opens.
2. First, before assign IBIS model, Part library directory should be assigned on your project directory's parts folder. The project directory means that it was specified through the 'Save as project' at the beginning of the tutorial.
   • Part library directory path : <your project directory>\Part

   
   
   
3. Click Synchronize.
4. Double-click H5TQ4G63AFR.
   The Electrical & Thermal Properties dialog displays.
5. Assign Simulation Model.
   1. Click Device Model Files.

      
      
      Figure 13.

      The Device Model Files dialog opens.
   2. Click Add in the Device Model Files dialog.
      The Model File dialog opens.
   3. Click to search and select the IBIS file (C:\ProgramData\altair\PollEx\<version>\Examples\Solver\PI\Simulation_Model\Memory.ibs) for DDR3 Memory device and click Open.

      
      
      Figure 14.

   4. Click OK to close the Model Files dialog.
      The full location of the IBIS model file assigned to the DDR3 Memory device is shown in the Device Model Files dialog. After selecting the added IBIS file, the Display menu allows you to investigate the detailed electrical properties of the Input/output buffer models included in the IBIS file. Input buffer models only contain Power_Clamp and Ground_Clamp characteristics. The DC (I-V) properties of Pull_Up and Pull_Down transistors and AC properties given in Rising/Falling waveforms are just related to the Output and IO buffer models. The DC, AC information for Input buffer models cannot be found.
      The Device Model Files dialog opens.
   5. Click Display to open the IBIS Manager dialog.

      
      
      Figure 15.

   6. Click the Model tab menu, select DQ_DRV_34.
      You can find and review the AC/DC properties by clicking each parameter of the DQ_DRV_34 model. By exploring the buffer’s AC/DC characteristics, you can choose the proper buffer model for PI Analysis.

      
      
      Figure 16.

   7. Click Close to close the IBIS Manager dialog.
   8. Click OK to close the dialog.
      When the IBIS file has multiple components, the Select Component dialog opens. Select one of them. Pin count is a good reference to select the correct one.
   9. Select the first component, click OK to close the Select Component dialog.

      
      
      Figure 17.

      The Electrical & Thermal Properties dialog opens. The DDR3 device’s part properties are assigned automatically as shown in the Electrical & Thermal Properties dialog.
   10. Select one of the tab menus among Signal Data, Driver/Receiver Model Data, Package Pin Parasitic Model Data, and Attribute, to display detailed information.

       
       
       Figure 18.

       The Signal Data tab menu shows basic information such as Signal Name, Pin Type, Pull-down/Pull-up Ref Signal, and Inverted Pin status.
   11. Select the Driver/Receiver Model Data tab menu to verify the detailed information related to I/O buffer assignment for each pin included in the IC part.
       The Device Model column denoted as IBIS means that the pin’s model is defined from IBIS data is not from SPICE or Linear Device Model. Set the driver and receiver buffer model of the corresponding pin in the Driver Model and Receiver Model columns. The Buffer Model specified here is used as the Default Buffer Model when performing Network Analysis in the future. The detailed AC/DC characteristics for each Driver/Receiver Models can be reviewed in the Device Model Files dialog.

       
       
       Figure 19.

       
       
       Figure 20.

6. Setup Power Information.
   1. Click Power Rails.

      
      
      Figure 21.

      The Power Rail dialog displays. All of the power rails used for this component display in the middle of this dialog.
   2. Click VDDQ.

      
      
      Figure 22.

      The Edit dialog displays.
   3. For DC Current, enter 500.
   4. For Allowable DC Voltage Drop, enter 0.1.

      
      
      Figure 23.

   5. Click Add to setup Target Impedance.
      The first row of target impedance is added.
   6. Enter 10 for the Min Target Frequency.
   7. Enter 100 for the Max Target Frequency.
   8. Enter 0.1 for the Target Impedance field.
   9. Click Add.
      The second row of target impedance is added.
   10. Enter 100 for the Min Target Frequency.
   11. Enter 300 for the Max Target Frequency.
   12. Enter 0.3 for Target Impedance.
   13. Click OK to close the Edit dialog.

       
       
       Figure 24.

   14. Click VREFDQ.
   15. Repeat steps 6.e - 6.m.
   16. Click VDDl.
   17. Repeat steps 6.e - 6.m.
   18. Click VREFCA.
       The remaining steps are the same as above.
   19. Click OK to close the Power Rail dialog.
   20. Select Digital IC from the drop-down menu of Functional Type field.

       
       
       Figure 25.

   21. Click OK to close the Electrical & Thermal Properties dialog.
       The Electrical icon of H5TQ4G63AFR appears.

       
       
       Figure 26.

In this step, you will assign IBIS to controller using method 1.

1. From the menu bar, click Properties > Parts.
2. Double-click NXP4330 and select the IBIS file (C:\ProgramData\altair\PollEx\<version>\Examples\Solver\PI\Simulation_Model\CPU.ibs)
3. repeat steps 5.a - 5.g of Assign IBIS Model.
4. Select CPU1.

   
   
   Figure 27.

5. Click OK in the Device Model Files dialog.
6. Enable the CPU check box.
7. Click OK.
8. Repeat step 6 of Assign IBIS Model.
9. Select Digital IC from the drop-down menu of Functional Type field.
10. Click OK to close the Electrical & Thermal Properties dialog.

In this step, you will assign function type to power component.

1. Double-click 47151-0001.
   The Electrical & Thermal Properties dialog displays.
2. Select Connector for the Functional Type.

   
   
   Figure 28.

3. Click OK to close the Electrical & Thermal Properties dialog.
4. Double-click 675031020.
5. For Functional Type, select Connector.

In this step, you will assign passive component data to R and C.

1. Double-click RC1005J000CS in the Parts dialog.
   The Electrical & Thermal Properties dialog displays.

   
   
   Figure 29.

   
   
   Figure 30.

2. Click Passive Component Data in the Electrical & Thermal Properties dialog.
3. For Passive Value Type, select Fixed.
   Note: In PI Analysis for Passive Value Type, it always operates as a fixed type regardless of whether the variable type is selected or not.
4. Enter 10K for the Nominal Value.
5. Leave the Model Type as RLC and enter 10000 for the Resistance (Ohm).

   
   
   Figure 31.

6. Click OK to close Passive Component Data dialogs.
7. Click OK to close the Electrical & Thermal Properties dialog and return to Parts dialog.
8. Double-click CL05X105MR3LNNH in the Parts dialog.
   The Electrical & Thermal Properties dialog displays.
   
   
9. For Passive Value Type, select Fixed.
10. Enter RLC for the nominal Value and enter 20 and 6.3 for tolerance and rate voltage.
11. Leave the model type as RLC and enter 0.05, 0.261 and 672000 for Resistance, Inductance and Capacitance respectively.
12. Click OK to close Passive Component Data dialog.
    
    
13. Double-click CL05C270JB5NNWC in the Parts dialog.
    The Electrical & Thermal Properties dialog displays.
    
    
14. Assign Simulation Model (Spice) to CL05C270JB5NNWC.
    1. Click Device Model Files.
       The Device Model Files dialog opens.
       
       
    2. Click Add in the Device Model Files dialog
       The Model File dialog opens.
    3. Click […] button to search and select the SPICE file ([C:\ProgramData\altair\PollEx\<version>\Examples\Solver\PI\Simulation_Model\GRM153R60J105ME15_DC0V.mod) for the capacitor and click Open.
       
       
    4. Click OK to close the Model Files dialog.
    5. Click Passive Component Data in the Electrical & Thermal Properties dialog.
    6. For Passive Value Type, select Fixed.
    7. Enter SPICEfor the nominal Value and enter 20 and 50 for tolerance and rated voltage.
    8. Leave the model type as SPICE and select GRM153R60J105ME15_DC0V.mod for Model File and Model Name.
    9. Click OK to close Passive Component Data dialog.
       
       
15. Return to Pars dialog and double-click CL05F103ZB5NNNC in the Parts dialog.
    
    
16. Assign Simulation model (S-Parameter) to CL05F103ZB5NNNC
    1. Click Device Model Files.
       The Device Model Files dialog opens.
    2. Click Add in the Device Model Files dialog. The Model File dialog opens.
    3. Click […] to search and select the S-Parameter file (C:\ProgramData\altair\PollEx\<version>\Examples\Solver\PI\Simulation_Model\GRM153R60J105ME15_DC0V.s2p) for the capacitor and click Open.
       
       
    4. Click OK to close the Model Files dialog.
    5. Click Passive Component Data in Electrical & Thermal Properties dialog.
    6. For Passive Value Type, select Fixed.
    7. Enter S-PARAM for the nominal Value and enter 20 and 50 for tolerance and rated voltage.
    8. Leave the model type as S-Parameter and select GRM153R60J105ME15_DC0V.s2pfor Model File and Model Name.
    9. Click OK to close Passive Component Data dialog.
       
       
17. Click OK to close Electrical & Thermal Properties dialog
18. You can check the changed passive value in Parts dialog.
19. Continuously, Double-click the RA1005J000CS part that has more than two pins in the Parts Dialog.

    
    
    Figure 32.

20. Click for the Functional Type and select Resistor.
21. Click Passive Component Data in the Electrical & Thermal Properties dialog.
22. For Passive Value Type, select Fixed.
23. Enter 100 ohm for the Resistance.

    Figure 33.

24. Click Pin Pairing in the Passive Component Data dialog to open the Pin Pairing dialog.
25. Click Add to define pin pairs.
    The specified passive component values are assigned separately to these paired pins.
    (Pin pair : 1-8, 2-7, 3-6, 4-5)

    Figure 34.

26. Close any opened dialogs.

1. From the menu bar, click Properties > Net Classes.
   The Net Classes dialog opens.
2. Click Add.
   The ADD dialog opens.
3. For net Class name, enter SDA_BUS and enter search string *SDA*# in the Search Strings field.

   
   
   Figure 35.

4. Click Add String.
5. Click OK to close the ADD dialog.
   The SDA_BUS net class is registered in the Net Classes dialog.
6. Click OK to close the Net Classes dialog.
7. Click Properties > Nets.
   The Nets dialog opens.
8. Click Find Net Class to assign net class using a pre-defined net class file.
   If there is a net whose net class is redundantly among the nets, the Choose one Net Class for each Net dialog open.
9. Leave the Net Class Names as Power and click OK.

   
   
   Figure 36.

   Three nets are classified as the SDA_BUS net class.

   
   
   Figure 37.

10. Click OK to close the Nets dialog.

1. Double-click MCU_ACK.
   The Edit dialog displays.
2. Change Net Type to Diff Signal +.
3. Select the other pair net MCU_ACKB as Diff Signal using the scroll bar.

   
   
   Figure 38.

4. Click OK to close the Edit dialog.
   The MCU_ACK and MCU_ACKB nets are combined as a differential pair net.

   
   
   Figure 39.

5. Select MCU_NADQS0 and MCU_PADQS0 in the Nets dialog.
6. Select Generate Differential Pair Net from the context menu.
   The Edit dialog opens.

   
   
   Figure 40.

7. Click OK to close the Edit dialog.
   The MCU_NADQS0 and MCU_PADQS0 nets are combined as a differential pair net.

   
   
   Figure 41.

   
   
   Figure 42.

8. Click OK to close the Nets dialog.

1. From the menu bar, click Properties > Nets.
   The Nets dialog opens.
2. Click Assign Net Type.
   The PollEx PI sets the properties for all nets automatically using net information described in IBIS files and property.

   
   
   Figure 43.

3. Click OK to close the Nets dialog.

1. From the menu bar, click Properties > Nets.
   The Nets dialog opens.
2. Double-click 5VCC.
   The Edit dialog opens.
3. For Net Type, click Power.
4. For voltage, enter 5.0.
5. Click OK to close the Edit dialog.

   
   
   Figure 44.

6. Double-click VCC1P0_CORE.
7. For Net Type, select Power.
8. For voltage, enter 1.0.
9. Click OK to close the Edit dialog.
10. Assign power value for power nets again using a different method.
    1. Click Edit Power Voltage.
       The Edit Power Voltage dialog opens.
    2. Click import for the voltage value by using voltage_value.xlsx. (File's path is below)
       C:\ProgramData\altair\PollEx\<version>\Examples\Solver\PI\voltage_value.xlsx
    3. Or, Click each Voltage(V) field and enter the Power value of each power net.

       Figure 45.

    4. Click OK to close the Edit Power Voltage dialog.
       The power values are assigned.

       
       
       Figure 46.

    5. Click OK to close the Nets dialog.

1. From the menu bar, click Properties > Composite Nets.
2. Activate Resistor and Capacitor.
3. Click Generate Composite Net.

   
   
   Figure 47.

   The Selects Nets to Exclude dialog opens.
4. Specify nets that should not be composited with other nets, such as Power and Ground nets.
   Nets whose Net Type is declared as Power or Ground are automatically excluded from the list.

   
   
   Figure 48.

5. Click OK and check the listed composited nets.

   
   
   Figure 49.

6. Click Composite Data or Pin List to review composite net structure or the pin list.

   
   
   Figure 50.

   Note: If you want to check the total net composition status for the composited nets, use the Option > Net 2D/3D Viewer menu. Select the composite net CN-||MCU_HDMI_HPD||NetCN1_19||. The secondly listed composited net above configured with MCU_HDMI_HPD and NetCN1_19 displays at the beginning of this composite net chapter.

   
   
   Figure 51.

7. Click OK to close the Composite Nets dialog.
8. In the PCB window, click File > Save to save the current setup.

1. From the menu bar, click Analysis > Power Integrity.
   The Select Power Integrity Analysis Model dialog displays.
2. Click Add by Selecting Signal Nets.

   
   
   Figure 52.

   The Select Simultaneous Switching Nets dialog displays. When selecting signal nets, the driver component of the Active Driver pin item must be the same.
3. Select DDR address nets to analyze SSN.
4. Enter DDR_SSN as the new model name.

   
   
   Figure 53.

5. Click Analyze to generate the PI model.
   The Select Power/Ground Net dialog opens.
6. Select the required power net and ground net and click OK.
   In this sample design, the VCC1P5_SYS power supplies power to the DDR pins. And GND is ground for DDR pins.

   
   
   Figure 54.

   The Power Integrity Analyzer dialog for DDR_SSN displays.
7. Click Properties > Power/Ground Nets.
   The Power/Ground Nets dialog opens. The net VCC1P5_SYS power net is selected for this analysis.
8. Click Close to close the Power/Ground Nets dialog.

   
   
   Figure 55.

9. Analyze PI using the Power Integrity Analyzer window.
   1. From the menu bar, click File > Exit to close the Power Integrity Analyzer dialog.
   2. In the PollEx PCB window, click Analysis > Power Integrity from the menu bar.
      The Select Power Integrity Analysis Model dialog opens.

      
      
      Figure 56.

   3. Click OK to close the Select Power Integrity Analysis Model dialog.

In this step, you will select required power net to assign target power net.

1. Click Analysis > Power Integrity.
   The Select Power Integrity Analysis Model dialog opens.
2. Click Add by Selecting Power Pins.
   The Select Power Net Pins dialog opens.

   
   
   Figure 57.

3. Select VCC1P0_CORE from Power Net list
4. Select CN::8 pins for source component pins and select U1_L17 and U1_L16 pins for load component pins.

   
   
   Figure 58.

5. Enter VCC1P0_CORE_Test as the new model name.
6. Click Analyze to generate the PI model.
   The Select Power/Ground Net dialog opens.
7. Select GND as a target ground net.

   
   
   Figure 59.

   The Select Power/Ground Net dialog is displays only when the selected component has multiple ground nets.
8. Click OK to close the Select Power/Ground Net dialog.
   The Power Integrity Analyzer dialog for VCC1P0_CORE power net opens. You can review PI for VCC1P0_CORE power net.
9. Click File > Exit to close the Power Integrity Analyzer dialog.

1. Click Analysis > Power Integrity.
   The Select Power Integrity Analysis Model dialog opens. You can see pre-saved PI models in the Model Name field. You can generate a new PI model for analysis, however you will use the pre-saved PI model.
2. Select VCC1P0_CORE_Test and click OK.

   
   
   Figure 60.

   The Power Integrity Analyzer dialog for VCC1P0_CORE_Test PI model opens.
3. Click Analysis > DC IR Drop Analysis.
   The DC IR Drop Analysis dialog opens.

   
   
   Figure 61.

4. Select VCC1P0_CORE and click Run Analysis to start DC IR Drop analysis.
   The DC IR Drop analysis starts. When the DC IR Drop analysis is done, the DC IR Drop Analysis Result Display dialog opens.
5. Select Voltage.

   
   
   Figure 62.

   The voltage map displays. The VCC1P0_CORE power was 1.0V at the source pin but dropped to 0.9991V at the load pin.
6. Select Current Density.

   
   
   Figure 63.

   The current density map displays.
7. Select Heat Density.

   
   
   Figure 64.

   The power density map displays.
8. Close DC IR Drop Analysis Result Display.
9. Click Close to close the DC IR Drop Analysis dialog.
10. Click to save this result.
11. Click File > Exit to close the Power Integrity Analyzer dialog.

1. Click Analysis > Power Integrity.
   The Select Power Integrity Analysis Model dialog opens. You can see pre-saved PI models in the Model Name field. You can generate a new PI model for analysis, however you will use the pre-saved PI model.
2. Click Add by selecting Power Pins.
   Result : The Select Power Net Pins dialog opens.

   
   
   Figure 65.

3. Select VCC_DDR_REF from Power Net list and Select U204::M8 pins for source component pins.
4. Enter VCC_DDR_REF_Test_composite model as a new model name.

   Figure 66.

5. Select Composite Net type for load pins and select CN3::4 pins for load component pins.

   Figure 67.

6. Click Analyze to generate the PI model.
   The Power Integrity Analyzer dialog for VCC_DDR_REF PI model opens.

   Figure 68.

7. Click Analysis > DC IR Drop Analysis.
   The DC IR Drop Analysis dialog opens.

   Figure 69.

8. Select VCC_DDR_REF and click Run Analysis to start DC IR Drop analysis.
   The DC IR Drop analysis starts. When the DC IR Drop analysis is done, the DC IR Drop Analysis Result Display dialog opens. You can check DC IR DROP Result involving the composite net type.

   
   
   Figure 70.

1. Click Analysis > Power Integrity.
   The Select Power Integrity Analysis Model dialog opens.
2. Select VCC1P0_CORE_Test and click OK.

   
   
   Figure 71.

   The Power Integrity Analyzer dialog for the VCC1P0_CORE_Test PI model opens.
3. Click Analysis > AC PDN Analysis.
   The AC PDN Analysis dialog opens.
4. Select Case1 and click Run Analysis to start AC PDN analysis.

   
   
   Figure 72.

   The AC PDN analysis starts. When the AC PDN analysis is done, the Network Parameter Viewer opens. You can see whether the Z11 meets Target Impedance.
5. Click Close to close the Network Parameter Viewer dialog.
   You can see the analysis result exists in the AC PDN Analysis dialog for Case1.

   
   
   Figure 73.

6. Click Close to close the AC PDN Analysis dialog.
7. Click to save this result.
8. Click File > Exit to close the Power Integrity Analyzer dialog.

1. Add Case.
   1. Click Analysis > Power Integrity.
      The Select Power Integrity Analysis Model dialog opens.
   2. Select VCC1P0_CORE_Test and click OK.

      
      
      Figure 74.

      The Power Integrity Analyzer dialog for the VCC1P0_CORE_Test model opens.
   3. Click Properties > Decoupling Capacitors in the Power Integrity Analyzer dialog.
      The Decoupling Capacitors dialog opens. For testing purposes, suppose that there is no decoupling capacitor in the VCC1P0_CORE power source. By assigning existing capacitor value as None.
   4. Click Assign Decaps to assign the capacitor value for the current design.
      The Assign Decaps dialog opens.
   5. Select None.

      
      
      Figure 75.

   6. Click C169~C159 to assign this value.
   7. Click Close to close the Assign Decaps dialog.

      
      
      Figure 76.

2. Add some test cases.
   1. Click any component in the Case 1 column and click Copy Case.
      The Case 2 column is added.
   2. Click any component in the Case 1 column and click Copy Case.
      The Case 3 column is added.

      
      
      Figure 77.

   3. Click OK to close the Decoupling Capacitors dialog.

1. Add VRM capacitor.
   1. In the Power Integrity Analyzer dialog, execute the Place-Decap Locations menu.
      The Decap Locations field is added to the right side of Power Integrity Analyzer dialog.
   2. Unselect GND net for better view and turn-off the display of trace by clicking .
      You can see the VCC1P0_CORE net only. For a more accurate placement, zoom in on the screen a bit.

      
      
      Figure 78.

   3. Select Add.
   4. Select Top.
   5. Select VRM.

      
      
      Figure 79.

   6. Select the position (X:38, Y:21.8) where the capacitor will be placed, near Source connector CN3.
      The VRM capacitor with the name CN3 displays at that position. The color of the CN3 capacitor is grey. It means that this capacitor only has location information. After the value is assigned to the capacitor, the color changes to red.

      
      
      Figure 80.

2. Add distributed capacitors.
   1. Select Add.
   2. Select Top.
   3. Select Distributed.
   4. Select VCC1P0_CORE for the Power Net.
   5. Select GND for the Ground Net.
   6. Enter 1.0 for X Spacing to set X axis spacing of distributed capacitors.
   7. Enter 1.0 for Y Spacing to set Y axis distance of distributed capacitors.

      
      
      Figure 81.

   8. Use the mouse’s drag-drop function to distribute the capacitors near the U1 component.
      Drag Point: X: 35.00, Y:28.30 ~ X: 37.20, Y:27.00
      The 5 distributed capacitors are placed. The coordinate of capacitors is used as capacitor names.

      Figure 82.

1. Assign value for VRM capacitor CCN3 of case2.
   1. Click Properties > Decoupling Capacitors.
      The Decoupling Capacitors dialog opens.
   2. Click Assign Decaps.
      The Assign Decaps dialog opens.
   3. Select CL10Y106MQ8NRNC (10uF).
   4. Click the 17th line of Case2 column to assign this value.
      The capacitor is assigned for 17th line of case2 column.

      Figure 83.

   5. Click Close to close the Assign Decaps dialog.
   6. Click OK to close the Decoupling Capacitors dialog.
2. Assign property for distributed capacitors of case3.
   1. Click Place > Assign Decaps.
      The Assign Decaps region is added at the right side of the Power Integrity Analyzer dialog.
   2. Select Case 3.
   3. Select CLL5Y104MQ3NLNC (0.1uF) for Decap to Use.
   4. Enable the Distributed Decaps checkbox.

      Figure 84.

   5. Click Assign to All Decap Locations to assign this value to all distributed capacitors.
      The color of distributed capacitors turns red. These capacitors now have value information.

      Figure 85.

3. Review capacitor property.
   1. Click Properties > Decoupling Capacitors.
      The Decoupling Capacitors dialog opens.

      Figure 86.

      You can review the capacitor assignment result.
   2. Click OK to close the Decoupling Capacitors dialog.
   3. Click File > Save to save the current setup.

1. Click Analysis > AC PDN Analysis.
   The AC PDN Analysis dialog opens.
2. Enable the Case 1, Case 2, and Case 3 check boxes.
3. Click Run Analysis.

   
   
   Figure 87.

   The AC PDN analysis starts. When the PDN analysis is done, the Network Parameter Viewer dialog opens.
4. Turn on the waveform of U1_L16::U1_L16 (Z11) of each case for comparison.
5. Change the wave colors.
   1. Set Case1 to Red.
   2. Set Case2 to Cyan.
   3. Set Case3 to Yellow.

   
   
   Figure 88.

   The 10uF low resonance frequency VRM capacitor is effective for improving the characteristics of the low frequency band Z11, and 0.1uF high resonance frequency distributed capacitors are effective for improving the characteristics of the mid frequency band Z11.

1. Click Analysis > Power Integrity.
   The Select Power Integrity Analysis Model dialog opens.
2. Click Add by Selecting Power Pins.
   The Select Power Net Pins dialog opens.
   
   
3. Select VCC1P0_CORE from Power Net list.
4. Select CN3::8 as source component pin and U1::G11 pin for load component pins.
5. Enter VCC1P0_CORE_Model Comparison as the new model name.
   
   
6. Click Analyze to generate the PI model.
   The Select Power/Ground Net dialog opens.
7. Select GND as a target ground net.
   The Select Power/Ground Net dialog is displayed only when the selected component has multiple ground nets.
   
   
8. Click OK to close Select Source Pin dialog.
   The Power Integrity Analyzer dialog for VCC1P0_CORE power net opens. You can review PI for VCC1P0_CORE power net.
9. Add Port capacitor.
   1. Click Place > Decap Locations in the Power Integrity Analyzer dialog.
      The Decap Locations dialog opens.
      
      
      
      
      
      
   2. For Mode, select ADD.
   3. For Place Layer, select TOP.
   4. For Decap Type, select Port.
   5. Select the position (X:37.00,Y:29.00) where the capacitor will be placed, near Port1 (G11). The Port capacitor with the name U1_G11 displays at that position. The color of the U1_G11 capacitor is grey.
      
      
10. Add cases.
    1. Click Properties > Decoupling Capacitors in the Power Integrity Analyzer dialog.
       The Decoupling Capacitors dialog opens.
    2. Click Assign Decaps to assign the capacitor value for the current design.
       The Assign Decaps dialog opens.
    3. Select None.
       
       
11. Add some test cases.
    1. Click any component in the Case 1 column and click Copy Case.
       The Case 2 column is added.
    2. Click any component in the Case 1 column and click Copy Case.
       The Case 3 column is added.
    3. Click any component in the Case 1 column and click Copy Case.
       The Case 4 column is added.
       
       
12. Assign value of Port capacitor for each Case 2, Case 3, and Case 4.
    1. Click Properties > Decoupling Capacitors in the Power Integrity Analyzer dialog.
       The Decoupling Capacitors dialog opens.
    2. Click Assign Decaps.
       The Assign Decaps dialog opens.
    3. Select CL05X105MR3LNNH (RLC)
    4. Click the 1st line of Case 2 column to assign this value. The capacitor is assigned for 1st line of Case 2 column.
       
       
    5. Select CL05C270JB5NNWC (SPICE).
    6. Click the 1st line of Case 3 column to assign this value. The capacitor is assigned for 1st line of Case 3 column.
       
       
    7. Select CL05F103ZB5NNNC (S-PARAM).
    8. Click the 1st line of Case 4 column to assign this value. The capacitor is assigned for 1st line of Case 4 column.
       
       
    9. Click OK to close the Assign Decaps dialog.
       
       
    10. Click OK to close the Decoupling Capacitors dialog.
    11. Click File > Save to save the current setup.
13. Click Analysis > ACPDN Analysis.
    The ACPDN Analysis dialog opens.
14. Enable the Case 1, Case 2, Case3, and Case 4 check boxes.
15. Click Run Analysis.
    
    
    The AC PDN analysis starts. When the PDN analysis is done, the Network Parameter Viewer dialog opens.
16. Change the wave colors.
    1. Set Case1 to Red.
    2. Set Case2 to Cyan.
    3. Set Case3 to Yellow.
    4. Set Case4 to Pink. (It is overlapped with Case3)
       
       

       The 1uF low resonance frequency Port capacitor is effective for improving the characteristics of the low frequency band Z11.

       In case 3 and 4, we applied both the SPICE model and S-parameter model of the GRM153R60J105ME15, and according to the GRM153R60J105ME15 data sheet, it has a resonant frequency of 10MHz. As a result, the AC PDN analysis shows that a resonance point is formed at around 8MHz, which is close to the 10MHz resonant frequency.