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PollEx User Guides
Discover PollEx functionality with comprehensive user guides.
Solver User Guides
This section contains the user guides for the following tools: PI, SI, SI Explorer, and Thermal.
SI Explorer
Analysis
In this section, you can learn how to do pre-layout SI Analysis.
Edit Electrical Analysis Constraints
View editable versatile control parameters which influence the simulation/analysis results for network, electromagnetic field, eye-diagram, and SPICE.

Welcome
What's New
View new features for PollEx 2025.
Get Started
Learn the basics and discover the workspace.
PollEx Tutorials
Discover PollEx functionality with interactive tutorials.
PollEx User Guides
Discover PollEx functionality with comprehensive user guides.
- Manufacture User Guides
  This section contains the user guides for the following tools: Block JIG Generator, Compare GDSII, Gerber to PCB, Make Board Paneling, Metal Mask Manager, Mounting Data Extractor, Mounting Emulator, Router-Machine JIG Generator, Solder Quantity Calculator, Soldering Pallet, Test Point Location Generator, and Underfill.
- Modeler User Guides
  This section contains the user guides for the following tools: BOM, CAM, Component Arrangement Plan, CP, Golden Sample, Logic, PCB, Redmark+, and Worksheet Planner.
- Solver User Guides
  This section contains the user guides for the following tools: PI, SI, SI Explorer, and Thermal.
  - PI
  - SI
  - SI Explorer
    - Introduction
      Signal integrity (SI) is a measure of the quality of an electrical signal.
    - Setup Methods
      The PollEx SI Explorer is a pre-layout simulation tool. It can be used for experimenting with various topology options to find routing constraints for critical nets.
    - Start from Scratch
      For easy building up the practical complex topologies, this feature allows you to study versatile net topologies depending on signaling types, for example: Single-ended, Differential, and Multi-coupled using built-in topology model libraries.
    - Setup Via Padstacks
      Manage via padstacks for electrical analysis.
    - Use Previous Design File
      You can use previous design file environment if you have previous design .pdbb file.
    - Analysis
      In this section, you can learn how to do pre-layout SI Analysis.
      - Edit Electrical Analysis Constraints
        View editable versatile control parameters which influence the simulation/analysis results for network, electromagnetic field, eye-diagram, and SPICE.
        EM Solver Run Control Parameters
        EM solver run control parameters control running built-in 2-D and 3-D electromagnetic full-wave field solvers.
        Waveform/Eye Diagram Analysis Parameters
        Default Device Models
        Specify default linear model to the parts which does not have simulation model.
        Network Analysis Parameters
        Control the frequency-domain analysis for extracting network parameters such as S, Y, and Z parameters.
        SPICE Run Control Parameters
        You can specify PollEx Spice’s simulation control parameters which will affect the simulation time, accuracy, and convergence characteristics.
      - Transmission Line Analysis
      - Net Topology Analysis
        Net topology analysis is used to construct or view the detailed physical topology of nets schematically and run signal integrity analysis on the interconnect network model.
      - Waveform Viewer
        Open files containing transient analysis waveforms or eye diagrams and review the waveforms.
  - Thermal
- Verification User Guides
  This section contains the user guides for the following tools: DFA, DFE, DFE+, DFM, and Logic DFE.
- UPE User Guides
  This section contains the PollEx UPE user guide.
PollEx Installation Guide
Instruction to install PollEx 2025.
Character String Search Rule
Definition for meta character using in making sentence for searching option.

Edit Electrical Analysis Constraints

View editable versatile control parameters which influence the simulation/analysis results for network, electromagnetic field, eye-diagram, and SPICE.

From the menu bar, click Analysis > Signal Integrity > Electrical Analysis Constraints.

The Electrical Analysis Constraints dialog opens.