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PollEx User Guides
Discover PollEx functionality with comprehensive user guides.
Verification User Guides
This section contains the user guides for the following tools: DFA, DFE, DFE+, DFM, and Logic DFE.
DFM
PollEx DFM is a board level manufacturability checking software.
Check Item Category
FPCB
FPCB is excellent for development of electronic components as electronic appliances are becoming miniaturized and lightweight.
Figure Layer
Check the clearance between data on specified layer and other objects.

Welcome
What's New
View new features for PollEx 2024.1.
Get Started
Learn the basics and discover the workspace.
PollEx Tutorials
Discover PollEx functionality with interactive tutorials.
PollEx User Guides
Discover PollEx functionality with comprehensive user guides.
- Manufacture User Guides
  This section contains the user guides for the following tools: Block JIG Generator, Compare GDSII, Gerber to PCB, Make Board Paneling, Metal Mask Manager, Mounting Data Extractor, Mounting Emulator, Router-Machine JIG Generator, Solder Quantity Calculator, Soldering Pallet, Test Point Location Generator, and Underfill.
- Modeler User Guides
  This section contains the user guides for the following tools: BOM, CAM, Component Arrangement Plan, CP, Golden Sample, Logic, PCB, Redmark+, and Worksheet Planner.
- Solver User Guides
  This section contains the user guides for the following tools: PI, SI, SI Explorer, and Thermal.
- Verification User Guides
  This section contains the user guides for the following tools: DFA, DFE, DFE+, DFM, and Logic DFE.
  - DFA
    PollEx DFA is an assembly status checking toolset for PCB design based on 3D package library.
  - DFE
  - DFE+
    PollEx DFE+ is a fully automated SI analysis tool.
  - DFM
    PollEx DFM is a board level manufacturability checking software.
    - Start DFM
      From the menu bar, click Option > DFM > Input after reading the design file to make a DFM input file.
    - Component Classification
    - Check Item Category
      - Board
      - Component
      - Drill Size
      - Etc.
      - FPCB
        FPCB is excellent for development of electronic components as electronic appliances are becoming miniaturized and lightweight.
        Bending Area
        Check the FPCB bending area.
        Bonding Area
        Check FPCB bonding areas.
        Bonding Pad
        Check FPCB bonding pads.
        Center Line Mark
        Check the rule for Center Line Mark in FPCB.
        Coverlay
        Check rules for Coverlay.
        Coverlay Open Area
        Check rules for Coverlay.
        Figure Layer
        Check the clearance between data on specified layer and other objects.
        FOG Dummy Pad Mark
        Check the rule of FOG dummy pads.
        Hole Out of Component Boundary
        Check vias out of specified component boundary.
        Manufacturing Process
        Check the size of Pin Pad and Pin Pitch to distinguish the FPCB manufacturing process.
        Meshed Copper
        Check if the bending area is designed with mesh copper.
        Min Via Spacing
        Check different clearances between vias.
        Rigid-Flex PCB
        Verification items related to Rigid-Flex PCB 1, Rigid-Flex 2, and Semi-Flex.
        Rounded Pattern
        Checks patterns in FPCB are rounded.
        Silk Keep Out Area
        Check clearance between certain components and another silkscreen.
        Silk Surrounding Via
        Check the rule of silkscreen around vias.
        Silver Paste
        Check the silver paste in bending area in FPCB.
        Stiffener
        Check rules of stiffener.
        Tab Sub Mark
        Tab Sub Mark is a mark to recognize the beginning of FPCB when rigid PCB is used with flexible PCB.
      - Ground Wall
        Check the clearance for an area affected by ground wall.
      - Package
      - PAD
      - Pattern
      - Placement
      - Test Point
        Verify if the clearance between test points and other objects follow specifications and if the test points contain text.
      - Test Point2
        Analyze the clearance between a test point and each component on a board.
      - Tooling
      - Underfill
        Find and examine underfill areas in BGA-type components.
    - Result
    - Lock Input Setup
      Lock the DFM input rule file (*.DFMI) to prevent any modifications from others.
  - Logic DFE
    PollEx Logic DFE is a toolset that checks electrical validity and standardizing of schematic design.
  - Technical Cleanliness
    PollEx Technical Cleanliness (TC) is an optional module of the PollEx PCB and a reliability analysis tool set for hazardous areas on a PCB design, using its micro particles.
- UPE User Guides
  This section contains the PollEx UPE user guide.
PollEx Installation Guide
Instruction to install PollEx 2024.1.
Character String Search Rule
Definition for meta character using in making sentence for searching option.

Figure Layer

Check the clearance between data on specified layer and other objects.

The Figure Layer dialog contains the following sections:

Checking
- Item: Specify item name.
- Check Type: Select checking type from the options below.
  - Comp to Layer: Check the clearance between data on layer1(TOP) and specified components.
  - Layer to Layer: Check the clearance between data on layer1(TOP) and data on layer2(BOT).
  - PCB Outline to Layer: Check the clearance between PCB Outline and data of Layer1(TOP) and Layer2(BOT).
- Layer1(TOP): Select the layer1, top.
- Layer2(BOT): Select the layer2, bottom.
- Comp Group: Select the target component group.
- Measure Base: Set target component measurement base.
- Clearance: Set the clearance value between objects.
- Target Layer Component: Option to specify the target component.
- Except Comp: Specify the component group to be excluded in checking.
- Except Component in Area: Specify the component group to be excluded from checking.