Schematic Verification
If there is a schematic verification process in the design project, the verification will be performed automatically after generating schematic outputs.
However, the verification conditions should be set in the process settings when registering the design project.
After checking in, the generated outputs are shown in the design status page.
- Click
to display the schematic design. PollEx Logic will
be executed and show the schematic design. - Click
to display the parts list extracted from the
schematic design. The list is shown as a BOM data format and for more detail,
refer the UBMS guide. - Click
to display the netlist extracted from the schematic
design. - Click
to display the rule information of verification
criteria. - Click
to display the verification results. PollEx Logic
will be invoked and display the results. - Click
to re-run the verification.
Figure 1. - Click
to check the verification results (Fail
List).