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PollEx User Guides
Discover PollEx functionality with comprehensive user guides.
Verification User Guides
This section contains the user guides for the following tools: DFA, DFE, DFE+, DFM, and Logic DFE.
DFE
DFE Items
Component
Keep Off Pair Comp
This DFE rules checks for those components that are not placed far enough.

Welcome
What's New
View new features for PollEx 2024.1.
Get Started
Learn the basics and discover the workspace.
PollEx Tutorials
Discover PollEx functionality with interactive tutorials.
PollEx User Guides
Discover PollEx functionality with comprehensive user guides.
- Manufacture User Guides
  This section contains the user guides for the following tools: Block JIG Generator, Compare GDSII, Gerber to PCB, Make Board Paneling, Metal Mask Manager, Mounting Data Extractor, Mounting Emulator, Router-Machine JIG Generator, Solder Quantity Calculator, Soldering Pallet, Test Point Location Generator, and Underfill.
- Modeler User Guides
  This section contains the user guides for the following tools: BOM, CAM, Component Arrangement Plan, CP, Golden Sample, Logic, PCB, Redmark+, and Worksheet Planner.
- Solver User Guides
  This section contains the user guides for the following tools: PI, SI, SI Explorer, and Thermal.
- Verification User Guides
  This section contains the user guides for the following tools: DFA, DFE, DFE+, DFM, and Logic DFE.
  - DFA
    PollEx DFA is an assembly status checking toolset for PCB design based on 3D package library.
  - DFE
    - Input Setup
    - Object Group Setting
      Group the same type of objects into the same group.
    - DFE Items
      - High Speed
      - Differential Pair Net
      - Net
      - Power
      - Filter
      - Component
        Approach Pair Comp
        Component Direction
        This rule checks the placement angle of two passive components like power inductor.
        Component Position
        The Component Position DFE rule checks whether a design follows a component placement guideline.
        Component Shield
        This DFE rule checks for the component ground shielding status.
        Comp-Connected Circuit
        This rule checks for the validity of circuit usage and whether the routing length and clearance from driver pins are within the specified distance.
        Keep Off Pair Comp
        This DFE rules checks for those components that are not placed far enough.
        NC Pin
        The NC Pin DFE rule checks for the NC pin connectivity.
        Pin Connected Width
        This rule checks that total trace width is wider than the requirement if there is branch.
        Polarity
        This DFE rule checks for the connectivity of capacitors or diodes that have polarities.
      - Board
    - DFE Environment
      View DFE Environment setting methods.
    - Result
  - DFE+
    PollEx DFE+ is a fully automated SI analysis tool.
  - DFM
    PollEx DFM is a board level manufacturability checking software.
  - Logic DFE
    PollEx Logic DFE is a toolset that checks electrical validity and standardizing of schematic design.
  - Technical Cleanliness
    PollEx Technical Cleanliness (TC) is an optional module of the PollEx PCB and a reliability analysis tool set for hazardous areas on a PCB design, using its micro particles.
- UPE User Guides
  This section contains the PollEx UPE user guide.
PollEx Installation Guide
Instruction to install PollEx 2024.1.
Character String Search Rule
Definition for meta character using in making sentence for searching option.

Keep Off Pair Comp

This DFE rules checks for those components that are not placed far enough.

Some of the components may cause bad effects on others. Those components must be placed with caution. If they are very weak against ESD problem, they should be placed apart from board edges. Power around the area where densely populated large power consuming components are placed is unstable. Careful component placement consideration is needed near those components in the high-power consuming area to achieve receiving stable power.

Allow bigger component spacing near the high heat dissipating components.

Item: Enter the item name.
Comp1: Assign the first component group.
Net of Comp1: Assign the nets that are connected to the first component group for selecting pin of target IC.
Measure Base of Comp1: Select measurement position.
- Pin Shape: Measure pin separation pin edge to edge.
- Pin Location: Measure pin separation pin center to center.
- COC: Measure IC separation with COC.
- SILK: Measure IC separation with SILK.
- ALL Pad Shape: Measure IC separation with Pin PAD.
Comp2: Select the second component.
Net of Comp2: Assign the nets that are connected to the second component group for selecting pin of target IC.
Measure Base of Comp2: Select measurement position.
- Pin Shape: Measure pin separation pin edge to edge.
- Pin Location: Measure pin separation pin center to center.
- COC: Measure IC separation with COC.
- SILK: Measure IC separation with SILK.
- ALL Pad Shape: Measure IC separation with Pin PAD.
Clearance: Assign clearance criteria.
Layer: Define check layer method.
- Same Layer: Check for the same layer on which components are placed.
- Opposite Layer: Check for the opposite layer of the layer on which components are placed.
- Any Layer: Check for distance on all (any) layers.

Test Cases

Case1: If there are EMI sensitive components, it is better to have enough clearance.
Case2: If large power consuming components are placed densely, the power around them is unstable. To get a stable power supply, the designer must carefully consider a proper component placement.
Case3: For the placement of high heat emitting components, the designer should consider bigger clearances among those components to spread out the heat.