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PollEx User Guides
Discover PollEx functionality with comprehensive user guides.
Solver User Guides
This section contains the user guides for the following tools: PI, SI, SI Explorer, and Thermal.
SI
SI Analysis
Learn how to do versatile SI Analysis for the PCB system in Pre-route or Post-route stages.
Crosstalk Analysis
Crosstalk noise is the change in voltage and current caused on a signal line due to the signal switching of its neighborhood lines.
Crosstalk Analysis Dialog Parameters

Welcome
What's New
View new features for PollEx 2024.1.
Get Started
Learn the basics and discover the workspace.
PollEx Tutorials
Discover PollEx functionality with interactive tutorials.
PollEx User Guides
Discover PollEx functionality with comprehensive user guides.
- Manufacture User Guides
  This section contains the user guides for the following tools: Block JIG Generator, Compare GDSII, Gerber to PCB, Make Board Paneling, Metal Mask Manager, Mounting Data Extractor, Mounting Emulator, Router-Machine JIG Generator, Solder Quantity Calculator, Soldering Pallet, Test Point Location Generator, and Underfill.
- Modeler User Guides
  This section contains the user guides for the following tools: BOM, CAM, Component Arrangement Plan, CP, Golden Sample, Logic, PCB, Redmark+, and Worksheet Planner.
- Solver User Guides
  This section contains the user guides for the following tools: PI, SI, SI Explorer, and Thermal.
  - PI
  - SI
    - Introduction
      Signal integrity (SI) is a measure of the quality of an electrical signal.
    - Create New Project
    - Common Analysis Setup
    - Assign Simulation Model
    - Manage Net Classes
      Classify nets according to their electrical characteristics.
    - Nets
      Net properties are basic attributes influencing the electrical analysis.
    - Generate Net Buses/Groups
      Generate Net Group or Bus Group for use with PollEx DFE+.
    - Edit Electrical Analysis Constraints
      View editable, versatile control parameters which influence the simulation/analysis results for crosstalk, network, electromagnetic field, eye-diagram, and SPICE.
    - SI Analysis
      Learn how to do versatile SI Analysis for the PCB system in Pre-route or Post-route stages.
      - Transmission Line Analysis
      - Network Analysis
      - Data Line Analysis
        Analyze interconnect network of data byte group nets of DDR BUS in time domain to obtain the eye diagrams and transient waveforms which are different views of the signal delay and distortion.
      - ADD/CMD/CTRL Line Analysis
        Use ADD/CMD/CTRL Line Analysis to analyze interconnect network of command and control group nets of DDR BUS in time domain to obtain the eye diagrams and transient waveforms which are different views of the signal delay and distortion.
      - Automatic DDR BUS Analysis
        Automatic DDR Bus Analysis menu is used for automatically extracting all data strobe, data, clock, address, command, and control line nets of DDR memory interfaces (using Net Class File), automatically constructing data line, address line, command line, and control line analysis models, performing eye diagram analyses on all the models, and calculating the setup and hold timing margins of all data, address, command, and control line signals.
      - Crosstalk Analysis
        Crosstalk noise is the change in voltage and current caused on a signal line due to the signal switching of its neighborhood lines.
        Crosstalk Analysis Dialog Parameters
      - Radiated Emission
        Radiated Emission Analysis menu allows you to analyze interconnect network of individual nets current in time and frequency domain.
      - IBIS-AMI Analysis
        IBIS-AMI (Algorithmic Modeling Interface) is a methodology used for high-speed serial link design, analysis, and verification.
      - SerDes Analysis
        SerDes stands for Serializer/Deserializer, which is a technology used for converting parallel data into a serial stream and vice versa.
      - MCP Analysis
        Multi-Chip Package (MCP) is a semiconductor packaging technology that combines multiple chips into one package, which can save space and cost while improving functionality and performance.
  - SI Explorer
  - Thermal
- Verification User Guides
  This section contains the user guides for the following tools: DFA, DFE, DFE+, DFM, and Logic DFE.
- UPE User Guides
  This section contains the PollEx UPE user guide.
PollEx Installation Guide
Instruction to install PollEx 2024.1.
Character String Search Rule
Definition for meta character using in making sentence for searching option.

Crosstalk Analysis Dialog Parameters

Figure 1.

Find Coupling: Extract and display the detailed coupling information, for example: coupled length, coupled net numbers, and mostly coupled net to each net.
Coupled Length: Shows the total coupled length of each net to other neighboring nets which meet the coupling check criteria displayed at the boxed area.
Number of Coupled: Shows the coupled nets number.
Most Coupled Net: The net coupling length with selected net is longest.
Net Name: Victim net name.
Display/Analyze Coupling: For user selected net, shows more detailed coupling information and provides options and menus for crosstalk analysis.
Manual Coupling: Analyze the coupling between nets specified by the user. After selecting Victim net, click the manual coupling button to open a dialog for selecting Aggressor net. When performing manual coupling, ignore the coupling parameter and select an aggressor net. Except, since the Min parallel length for coupling (mm) parameter is still considered, the user must input an appropriate value.