- Buffer
This block buffers the inputs, by row, as the block is activated through its I port, and outputs the buffered content once the block is activated through its O port. The full output activation port can be connected to the port O for output buffering when the buffer is full.
- ShiftRegister
This block implements a FIFO shift register. A shift is performed with every activation of the block. The Register Initial Condition parameter is a matrix that contains in its columns the values originally present in the shift register.
- EventDelayChannel
This block implements an event channel. The event timing is specified by the value on the first input port of the block. This value corresponds to delay after which the event is to be fired. The value associated with the event is read on the second input and placed on the output when the block is activated through its second input activation port.
- MaxMinInterval
This block outputs the minimum/maximum of all past input values between two subsequent input events. A Function parameter list provides functions to apply.
- SerialToParallel
This block buffers and outputs a sequence of the input vectors. The output is a matrix.
