2024.1
Discover PollEx functionality with comprehensive user guides.
This section contains the user guides for the following tools: DFA, DFE, DFE+, DFM, and Logic DFE.
PollEx Logic DFE is a toolset that checks electrical validity and standardizing of schematic design.
Manage and define DFE rule checks.
View new features for PollEx 2024.1.
Learn the basics and discover the workspace.
Discover PollEx functionality with interactive tutorials.
This section contains the user guides for the following tools: Block JIG Generator, Compare GDSII, Gerber to PCB, Make Board Paneling, Metal Mask Manager, Mounting Data Extractor, Mounting Emulator, Router-Machine JIG Generator, Solder Quantity Calculator, Soldering Pallet, Test Point Location Generator, and Underfill.
This section contains the user guides for the following tools: BOM, CAM, Component Arrangement Plan, CP, Golden Sample, Logic, PCB, Redmark+, and Worksheet Planner.
This section contains the user guides for the following tools: PI, SI, SI Explorer, and Thermal.
PollEx DFA is an assembly status checking toolset for PCB design based on 3D package library.
PollEx DFE+ is a fully automated SI analysis tool.
PollEx DFM is a board level manufacturability checking software.
In this section, DFE rule input methods are explained.
Group similar target objects in the Classification section of the DFE Input dialog.
Rule check for special purpose components in circuits.
Rule check for special purpose circuits.
Rule check for special purpose filters that consist of several components.
Rule check for damping resistors.
Rule check for whether a specific net name string is used for differential net name.
Rule check for whether a specific net exist in design and its required count.
This item calculates the load capacitance of component. Load Capacitance includes the capacity of the connected capacitor and the Cin of the IC.
This item checks for the existence of a Pair Net using the net name or property.
This item can detect an existence of One Pin Net which connected only one pin.
Rule check for components that should not be connected to certain nets.
Rule check for when more than one component belonging to component group are connected to the same net.
Manage and define stress test rule checks.
DFE input rule file (*.SDFEI) can be locked to prevent any modifications from users.
*.SDFEI
PollEx Technical Cleanliness (TC) is an optional module of the PollEx PCB and a reliability analysis tool set for hazardous areas on a PCB design, using its micro particles.
This section contains the PollEx UPE user guide.
Instruction to install PollEx 2024.1.
Definition for meta character using in making sentence for searching option.
