WiredX
Wired node with multiple input and one output
Library
Modelica/Electrical/Digital/Tristates
Description
Wires n input signals in one output signal, without delay.
Resolution table is given by http://www.cs.sfu.ca/~ggbaker/reference/std_logic/src/std_logic_misc.vhd
Parameters
Name | Label | Description | Data Type | Valid Values |
---|---|---|---|---|
mo_n | n | Number of inputs | Scalar | |
mo_auxiliary | auxiliary | auxiliary | Structure | |
mo_auxiliary/fixed | fixed | Cell of vectors | true | |
mo_auxiliary/start | start | FromModelica('Modelica.Electrical.Digital.Interfaces.Logic.''U''') |
Name | Label | Description | Data Type | Valid Values |
---|---|---|---|---|
mo__nmodifiers | Number of Modifiers | Specifies the number of modifiers | Number | |
mo__modifiers | Modifiers | Add new modifier | Structure | |
mo__modifiers/varname | Variable name | Cell of strings | ||
mo__modifiers/attribute | Attribute | Cell of strings | 'start' | |
mo__modifiers/value | Value |
Ports
Name | Type | Description | IO Type | Number |
---|---|---|---|---|
x | implicit | Connector of Digital input signal vector | input | 1 |
y | implicit | Connector of Digital output signal | output | 1 |