WiredX

Wired node with multiple input and one output

    WiredX

Library

Modelica/Electrical/Digital/Tristates

Description

Wires n input signals in one output signal, without delay.

Resolution table is given by http://www.cs.sfu.ca/~ggbaker/reference/std_logic/src/std_logic_misc.vhd

Parameters

WiredX_0

NameLabelDescriptionData TypeValid Values

mo_n

n

Number of inputs

Scalar

mo_auxiliary

auxiliary

auxiliary

Structure

mo_auxiliary/fixed

fixed

Cell of vectors

true
false

mo_auxiliary/start

start

FromModelica('Modelica.Electrical.Digital.Interfaces.Logic.''U''')
FromModelica('Modelica.Electrical.Digital.Interfaces.Logic.''X''')
FromModelica('Modelica.Electrical.Digital.Interfaces.Logic.''0''')
FromModelica('Modelica.Electrical.Digital.Interfaces.Logic.''1''')
FromModelica('Modelica.Electrical.Digital.Interfaces.Logic.''Z''')
FromModelica('Modelica.Electrical.Digital.Interfaces.Logic.''W''')
FromModelica('Modelica.Electrical.Digital.Interfaces.Logic.''L''')
FromModelica('Modelica.Electrical.Digital.Interfaces.Logic.''H''')
FromModelica('Modelica.Electrical.Digital.Interfaces.Logic.''-''')
'L.''Z'''

WiredX_1

NameLabelDescriptionData TypeValid Values

mo__nmodifiers

Number of Modifiers

Specifies the number of modifiers

Number

mo__modifiers

Modifiers

Add new modifier

Structure

mo__modifiers/varname

Variable name

Cell of strings

mo__modifiers/attribute

Attribute

Cell of strings

'start'
'fixed'

mo__modifiers/value

Value

Ports

NameTypeDescriptionIO TypeNumber

x

implicit

Connector of Digital input signal vector

input

1

y

implicit

Connector of Digital output signal

output

1