And
Logical 'and': y = u1 and u2
Library
Modelica/Blocks/Logical
Description
The output is true if all inputs are true, otherwisethe output is false.
Ports
Name | Type | Description | IO Type | Number |
---|---|---|---|---|
u1 | implicit | Connector of first Boolean input signal | input | 1 |
u2 | implicit | Connector of second Boolean input signal | input | 2 |
y | implicit | Connector of Boolean output signal | output | 1 |