The SPEF Parser
This document describes the function of the software unit that reads SPEF files and stores the extracted parasitics in the hierarchical database ZDB for later processing.
Overview
Introduction
In addition of using the StarVision PRO GUI to read SPEF files either the stand alone binary spef2zdb
or the Tcl command zspef
can be used.
The spef2zdb
binary reads the given SPEF file and creates a binfile containing the connectivity and parasitics of the input file:
spef2zdb -o binfile.zdb <OPTIONS> <FILE.SPEF>
The zspef
Tcl command reads the given SPEF file and returns the created in-memory database:
set db [zspef <OPTIONS> <FILE.SPEF>]
The SPEF parser can also add parasitic information to an already existing database. This can be controlled by the -matchParasitic
option.
The Tcl command is available in the Console window of the StarVision PRO GUI
and in the starsh
shell
.
This document describes the usage of this flow.
Options
Option | Parameters | Description |
---|---|---|
|
Analyze spf coupling ports. |
|
|
Read cmdline arguments from file. |
|
|
Remove hierarchy if subckt has one device. |
|
|
Remove hierarchy if subckt has no device. |
|
|
Open this binfile as a precompiled library. |
|
|
Stop on errors during parsing. |
|
|
Connect matching net by name, i.e. don’t route it. |
|
|
Name of the created top sub-circuit. |
|
|
Create hierarchy from flat instance names. Split the instance names at the given hierarchy separator. If the given hierarchy separator character is an empty string then the hierarchy separator character is guessed. |
|
|
Enable a specific debug flag. |
|
|
Define a subckt to be used as a device. In contrast to -subckt2dev here the port mapping defines the function of the ports.The port mappings consist of a comma separated list of pairs with the primitive port name and the function separated with an equal sign. E.g. -definedevice "nmos_macro" "NMOS" "s=SOURCE,b=BULK,d=DRAIN,g=GATE". |
|
Don’t cut long filenames in messages. |
||
|
Expand subckt after parser has finished. |
|
|
Fill content of parasitic net. |
|
Overwrite existing symbols with the symbols from the given symbol library files (option -symlib). |
||
|
Define global ground node (this option can be repeated multiple times). |
|
|
Group instances with same basename before given separator. |
|
|
Guess buses based on net and port names with a bit subscript enclosed in the given 'open' and 'close' characters. |
|
|
Guess instance arrays based on instance names with a bit subscript enclosed in the given 'open' and 'close' characters. |
|
|
Guess macro model devices. |
|
|
Guess power/ground nets connected to bulks. |
|
Read only spf header |
||
Print a help text with a short description of each option. |
||
|
Add comments to instances. |
|
|
Case-insensitive parser. |
|
|
Level of verbosity for issued messages. |
|
|
Merge the content of parasitic modules into the design. |
|
|
Compile the given files into an already existing database. |
|
|
Add attributes for layout coordinates. |
|
Append to logfile. |
||
|
Generate log file. |
|
|
Match to an existing design. |
|
|
Merge parallel transistors into one. |
|
|
Merge parallel capacitors into one. |
|
|
Merge parallel diodes into one. |
|
|
Variation to treat device values as equal for the merge parallel options (enter a value between 0.0 and 1.0). |
|
|
Merge parallel instances of matching cells. Details are described here. |
|
|
Merge parallel resistors into one. |
|
|
Merge serial transistors into one. |
|
|
Merge serial capacitors into one. |
|
|
Merge serial resistors into one. |
|
|
Define a model. |
|
|
Name of the multiplier attribute for parallel devices (default is "M"). |
|
Print no greeting message. |
||
|
Name of the zdb output binfile. |
|
|
Prepend given path while matching design. |
|
|
Define global power node (this option can be repeated multiple times). |
|
Print progress information. |
||
|
Define a range in the file to read. |
|
|
Recognize transistors that form a gate. |
|
|
Create box for non recognized groups. |
|
|
Create supply ports on recognized gates. |
|
|
Fold recognized gates using one of the following methods: Use 'nofold' to disable folding, use 'fold' to fold all recognized gates, use 'autofold' to fold only recognized gates with equal attribute values and use 'noflat' to fold all recognized gates but do not create flat attributes. |
|
|
Do not recognize gates with transistors in parallel paths. |
|
|
Do not recognize transfer gates. |
|
|
Remove capacitors connected to only one net. |
|
|
Remove empty modules. |
|
|
Remove leading chars from inst names. |
|
|
Remove spurious MOS transistors (e.g. if the gate pin is connected to power/ground, if all pins are dangling or shortened, etc.). |
|
|
Remove resistors connected to only one net. |
|
|
Suffix for renaming duplicate cells. |
|
|
Resolve duplicate cells. If "off" all duplicate cells are renamed. |
|
|
Create source code references. |
|
|
Define a subckt to be used as a device. Ports must match the sequence defined for the function. E.g. -subckt2dev "nmos_macro" "NMOS". |
|
|
Suppress messages which match pattern. |
|
Preload symbol library file(s) given with the -symlib option. |
||
|
Specify a symbol library file. |
|
Print CPU time consumption (requires enabled progress updates). |
||
Validate DB before creating the zdb output file. |
||
|
Wait 'sec' seconds for a license. If the value is -1 then the started tool will not wait for the next free license. Use a value of 0 to wait forever. |