The RTL Parser

This document describes the function of the software unit that reads and elaborates RTL files and stores the connectivity (with parameters) in the hierarchical database ZDB for later processing. It supports all variants of Verilog, SystemVerilog and VHDL.

Overview

Introduction
RTL Parser Options
VDB Creation
- VDB Options

Introduction

In addition of using the StarVision PRO GUI to read RTL files either the stand alone binary rtl2zdb or the Tcl command zrtl can be used.

The rtl2zdb binary reads the given RTL files and creates a binfile containing the elaborated netlist of the input files:

rtl2zdb -o binfile.zdb <OPTIONS> <FILES>

The zrtl Tcl command reads the given RTL files and returns the elaborated netlist of the input files as an in-memory database:

set db [zrtl <OPTIONS> <FILES>]

The RTL parser can use precompiled VHDL libraries. The precompiled library format is called VDB and can be created using the StarVision PRO GUI, the vhdl2vdb stand alone binary or the Tcl command zvdb.

The Tcl commands are available in the Console window of the StarVision PRO GUI and in the starsh shell .

This document describes the usage of this flow.

RTL Parser Options

Option Parameters Description

Option	Parameters	Description
`-allowRamInLoop`	`on\|off`	Elaborate RAM used within loops. (The default value for this option is `on`.)
`-argsFromFile`	`<file>`	Read cmdline arguments from file.
`-binlib`	`<file>`	Open this binfile as a precompiled library.
`-breakOnError` \| `-breakOnErr`	`on\|off`	Stop on errors during parsing. (The default value for this option is `off`.)
`-compact`	`off\|low\|med\|full`	Adjust the level of compaction for a RTL schematic. (The default value for this option is `med`.)
`-compileMode`	`default\|mfcu\|sfcu`	Set the RTL compile mode. Mode can either be the default of the specified input language, multi file compilation unit (mfcu) or single file compilation unit (sfcu). (The default value for this option is `default`.)
`-connectByName`	`<netnamepattern>`	Connect matching net by name, i.e. don’t route it.
`-createBus`	`on\|off`	Create buses for ports with Verilog conform, consecutive numbering. (The default value for this option is `off`.)
`-createMacroObjects`	`on\|off`	Store macro definition and reference info in virtual objects. (The default value for this option is `off`.)
`-createUniqConsts`	`on\|off`	Create unique nets for all constants. (The default value for this option is `off`.)
`-cse`	`on\|off`	Perform common subexpression elimination and merge logic that creates the same functional behavior. (The default value for this option is `off`.)
`-debugFlag`	`<flag>`	Enable a specific debug flag.
`-define`	`<macro>`	Define a Verilog macro on the command line.
`+define+`	`<m>=<v>`	Define Verilog macros on the command line.
`-defParam`	`<param>=<value>`	Define generic value (VHDL only).
`-dontCut`		Don’t cut long filenames in messages.
`-dontElaborate`	`<pattern>`	Don’t elaborate modules matching the name pattern.
`-F`	`<fileset>`	Read Verilog fileset file. The files in the fileset are relative to the fileset file.
`-f`	`<fileset>`	Read Verilog fileset file. Files in the fileset are relative to the current working directory.
`-forceSymlib`		Overwrite existing symbols with the symbols from the given symbol library files (option -symlib).
`-funcHier`	`on\|off`	Create hierarchy for function calls. (The default value for this option is `off`.)
`-globalInclude`	`<file>`	Define global Verilog include files. Global includes are processed before any other source files (this option can be repeated multiple times).
`-help` \| `-h`		Print a help text with a short description of each option.
`-hierSep`	`<hiersepchar>`	Set the desired hierarchy separator 'hiersepchar' of your choice. Any character can be used. To be able to identify the hierarchy separator, a character that is not already used in an identifier should be used.
`-ignoreCase`	`on\|off`	Case-insensitive parser. (The default value for this option is `on`.)
`-ignorePragmas`	`on\|off`	Ignore all Pragmas. (The default value for this option is `off`.)
`-ignoreTranslate`	`on\|off`	Ignore only Translate and Synthesis Pragmas. (The default value for this option is `off`.)
`-ignoreUnit`	`<unit>`	Do not elaborate the VHDL unit <unit>; any VHDL unit whose name matches <unit> case-insensitively will not be elaborated.
`-incdir`	`<dir>`	Define an include directory (this option can be repeated multiple times).
`+incdir+`	`<d1>+<d2>…`	Define include directories.
`-info`	`None\|Error\|Warning\|Verbose\|Debug`	Level of verbosity for issued messages. (The default value for this option is `Error`.) (This option is only available for the `rtl2zdb` executable.)
`-into`	`<dbname>`	Compile the given files into an already existing database. (This option is only available for the `zrtl` command.)
`-L`	`<library>`	Search for Verilog modules and packages in <library>; multiple libraries can be specified using multiple -L options; libraries are searched in the order of the -L options.
`+libext+`	`<e1>+<e2>…`	Define the file name extensions for the -y option.
`-library`	`<name>`	Parse all files following this option into a library with the given name.
`-localdefine`	`<macro>`	Define a Verilog macro local to the next file.
`+localdefine+`	`<m>=<v>`	Define Verilog macros on the command line.
`-localincdir`	`<dir>`	Define an include directory local to next file(this option can be repeated multiple times).
`+localincdir+`	`<d1>+<d2>…`	Define include directories local to next file.
`-logAppend`		Append to logfile.
`-logfile`	`<file>`	Generate log file. (This option is only available for the `rtl2zdb` executable.)
`-maxErrCnt`	`<num>`	Set maximum number of errors that can occur before the parser stops reading the input file(s). (The default value for this option is `0`.)
`-minRamSize`	`<min>`	Minimum size (in bits) a RAM needs to be before RTL elaboration extracts it. Value 0 means no lower limit. (The default value for this option is `4096`.)
`-netlistPattern`	`<pattern>`	Matching files are structural Verilog files.
`-noHierSep`		Don’t search for a hierarchy separator.
`-nologo`		Print no greeting message.
`-o` \| `-out`	`<file>`	Name of the zdb output binfile. (This option is only available for the `rtl2zdb` executable.)
`-operContents`	`on\|off`	Create operator implementation. (The default value for this option is `on`.)
`-pedantic`	`on\|off`	Toggle pedantic language checking mode (in relaxed mode some errors are just warnings and some warnings are suppressed). (The default value for this option is `on`.)
`-preProcessOutputFile`	`<fileName>`	Preprocess verilog macros and includes. Write output to given file.
`-preserveAssign`	`on\|off`	Preserve assignments in the netlist. (The default value for this option is `off`.)
`-preserveX`	`on\|off`	Preserve X values when generating netlists from RTL. (The default value for this option is `on`.)
`-procHier`	`on\|off`	Create hierarchy for always and process blocks. (The default value for this option is `off`.)
`-prog`		Print progress information. (This option is only available for the `rtl2zdb` executable.)
`-renameSuffix`	`<suffix>`	Suffix for renaming duplicate cells.
`-resolveDuplicates`	`on\|off`	Resolve duplicate cells. If "off" all duplicate cells are renamed. (The default value for this option is `on`.)
`-sdbl`	`<file>`	Name of Verific sdbl file.
`-spos`	`on\|off`	Create source code references. (The default value for this option is `on`.)
`-suppress`	`<type> <pattern>`	Suppress messages which match pattern. (This option is only available for the `rtl2zdb` executable.)
`-sym2zdb`		Preload symbol library file(s) given with the -symlib option.
`-symlib`	`<symlib>`	Specify a symbol library file.
`-systemVerilog` \| `-sysverilog` \| `-sverilog` \| `-sv`		Read RTL SystemVerilog 2009.
`+systemverilogext+`	`<e1>+<e2>…`	Define SystemVerilog file name extensions.
`-sysVerilog2005`		Read RTL SystemVerilog 2005.
`-time`		Print CPU time consumption (requires enabled progress updates). (This option is only available for the `rtl2zdb` executable.)
`-top`	`<name>`	Define this module as the top module. If * is set, then all unreferenced cells are used as top.
`-topLibrary`	`<name>`	The library containing the top-level design.
`-v`	`<libfile>`	Read <libfile> as Verilog library file.
`-validate`		Validate DB before creating the zdb output file.
`+verilog1995ext+`	`<e1>+<e2>…`	Define Verilog 1995 file name extensions.
`-verilog2001` \| `-v2k` \| `+v2k`		Read RTL Verilog 2001.
`+verilog2001ext+`	`<e1>+<e2>…`	Define Verilog 2001 file name extensions.
`-verilog95`		Read RTL Verilog 95.
`-verilogAMS`		Read RTL Verilog AMS.
`-vhdl2000`		Read RTL VHDL 2000.
`-vhdl2008`		Read RTL VHDL 2008.
`-vhdl2019`		Read RTL VHDL 2019.
`-vhdl87`		Read RTL VHDL 87.
`-vhdl93`		Read RTL VHDL 93.
`-vhdlLibPath`	`<dir>`	Look for and store precompiled VHDL libraries in <dir>.
`-wait_for_license` \| `-waitForLicense`	`<sec>`	Wait 'sec' seconds for a license. If the value is -1 then the started tool will not wait for the next free license. Use a value of 0 to wait forever. (The default value for this option is `-1`.) (This option is only available for the `rtl2zdb` executable.)
`-y`	`<libdir>`	Read files matching the extension given with +libext+ from the specified directory as Verilog library files.

-allowRamInLoop

on|off

Elaborate RAM used within loops.
(The default value for this option is on.)

-argsFromFile

<file>

Read cmdline arguments from file.

-binlib

<file>

Open this binfile as a precompiled library.

-breakOnError | -breakOnErr

on|off

Stop on errors during parsing.
(The default value for this option is off.)

-compact

off|low|med|full

Adjust the level of compaction for a RTL schematic.
(The default value for this option is med.)

-compileMode

default|mfcu|sfcu

Set the RTL compile mode. Mode can either be the default of the specified input language, multi file compilation unit (mfcu) or single file compilation unit (sfcu).
(The default value for this option is default.)

-connectByName

<netnamepattern>

Connect matching net by name, i.e. don’t route it.

-createBus

on|off

Create buses for ports with Verilog conform, consecutive numbering.
(The default value for this option is off.)

-createMacroObjects

on|off

Store macro definition and reference info in virtual objects.
(The default value for this option is off.)

-createUniqConsts

on|off

Create unique nets for all constants.
(The default value for this option is off.)

-cse

on|off

Perform common subexpression elimination and merge logic that creates the same functional behavior.
(The default value for this option is off.)

-debugFlag

<flag>

Enable a specific debug flag.

-define

<macro>

Define a Verilog macro on the command line.

+define+

<m>=<v>

Define Verilog macros on the command line.

-defParam

<param>=<value>

Define generic value (VHDL only).

-dontCut

Don’t cut long filenames in messages.

-dontElaborate

<pattern>

Don’t elaborate modules matching the name pattern.

-F

<fileset>

Read Verilog fileset file. The files in the fileset are relative to the fileset file.

-f

<fileset>

Read Verilog fileset file. Files in the fileset are relative to the current working directory.

-forceSymlib

Overwrite existing symbols with the symbols from the given symbol library files (option -symlib).

-funcHier

on|off

Create hierarchy for function calls.
(The default value for this option is off.)

-globalInclude

<file>

Define global Verilog include files. Global includes are processed before any other source files (this option can be repeated multiple times).

-help | -h

Print a help text with a short description of each option.

-hierSep

<hiersepchar>

Set the desired hierarchy separator 'hiersepchar' of your choice. Any character can be used. To be able to identify the hierarchy separator, a character that is not already used in an identifier should be used.

-ignoreCase

on|off

Case-insensitive parser.
(The default value for this option is on.)

-ignorePragmas

on|off

Ignore all Pragmas.
(The default value for this option is off.)

-ignoreTranslate

on|off

Ignore only Translate and Synthesis Pragmas.
(The default value for this option is off.)

-ignoreUnit

<unit>

Do not elaborate the VHDL unit <unit>; any VHDL unit whose name matches <unit> case-insensitively will not be elaborated.

-incdir

<dir>

Define an include directory (this option can be repeated multiple times).

+incdir+

<d1>+<d2>…

Define include directories.

-info

None|Error|Warning|Verbose|Debug

Level of verbosity for issued messages.
(The default value for this option is Error.)
(This option is only available for the rtl2zdb executable.)

-into

<dbname>

Compile the given files into an already existing database.
(This option is only available for the zrtl command.)

-L

<library>

Search for Verilog modules and packages in <library>; multiple libraries can be specified using multiple -L options; libraries are searched in the order of the -L options.

+libext+

<e1>+<e2>…

Define the file name extensions for the -y option.

-library

<name>

Parse all files following this option into a library with the given name.

-localdefine

<macro>

Define a Verilog macro local to the next file.

+localdefine+

<m>=<v>

Define Verilog macros on the command line.

-localincdir

<dir>

Define an include directory local to next file(this option can be repeated multiple times).

+localincdir+

<d1>+<d2>…

Define include directories local to next file.

-logAppend

Append to logfile.

-logfile

<file>

Generate log file.
(This option is only available for the rtl2zdb executable.)

-maxErrCnt

<num>

Set maximum number of errors that can occur before the parser stops reading the input file(s).
(The default value for this option is 0.)

-minRamSize

<min>

Minimum size (in bits) a RAM needs to be before RTL elaboration extracts it. Value 0 means no lower limit.
(The default value for this option is 4096.)

-netlistPattern

<pattern>

Matching files are structural Verilog files.

-noHierSep

Don’t search for a hierarchy separator.

-nologo

Print no greeting message.

-o | -out

<file>

Name of the zdb output binfile.
(This option is only available for the rtl2zdb executable.)

-operContents

on|off

Create operator implementation.
(The default value for this option is on.)

-pedantic

on|off

Toggle pedantic language checking mode (in relaxed mode some errors are just warnings and some warnings are suppressed).
(The default value for this option is on.)

-preProcessOutputFile

<fileName>

Preprocess verilog macros and includes. Write output to given file.

-preserveAssign

on|off

Preserve assignments in the netlist.
(The default value for this option is off.)

-preserveX

on|off

Preserve X values when generating netlists from RTL.
(The default value for this option is on.)

-procHier

on|off

Create hierarchy for always and process blocks.
(The default value for this option is off.)

-prog

Print progress information.
(This option is only available for the rtl2zdb executable.)

-renameSuffix

<suffix>

Suffix for renaming duplicate cells.

-resolveDuplicates

on|off

Resolve duplicate cells. If "off" all duplicate cells are renamed.
(The default value for this option is on.)

-sdbl

<file>

Name of Verific sdbl file.

-spos

on|off

Create source code references.
(The default value for this option is on.)

-suppress

<type> <pattern>

Suppress messages which match pattern.
(This option is only available for the rtl2zdb executable.)

-sym2zdb

Preload symbol library file(s) given with the -symlib option.

-symlib

<symlib>

Specify a symbol library file.

-systemVerilog | -sysverilog | -sverilog | -sv

Read RTL SystemVerilog 2009.

+systemverilogext+

<e1>+<e2>…

Define SystemVerilog file name extensions.

-sysVerilog2005

Read RTL SystemVerilog 2005.

-time

Print CPU time consumption (requires enabled progress updates).
(This option is only available for the rtl2zdb executable.)

-top

<name>

Define this module as the top module. If * is set, then all unreferenced cells are used as top.

-topLibrary

<name>

The library containing the top-level design.

-v

<libfile>

Read <libfile> as Verilog library file.

-validate

Validate DB before creating the zdb output file.

+verilog1995ext+

<e1>+<e2>…

Define Verilog 1995 file name extensions.

-verilog2001 | -v2k | +v2k

Read RTL Verilog 2001.

+verilog2001ext+

<e1>+<e2>…

Define Verilog 2001 file name extensions.

-verilog95

Read RTL Verilog 95.

-verilogAMS

Read RTL Verilog AMS.

-vhdl2000

Read RTL VHDL 2000.

-vhdl2008

Read RTL VHDL 2008.

-vhdl2019

Read RTL VHDL 2019.

-vhdl87

Read RTL VHDL 87.

-vhdl93

Read RTL VHDL 93.

-vhdlLibPath

<dir>

Look for and store precompiled VHDL libraries in <dir>.

-wait_for_license | -waitForLicense

<sec>

Wait 'sec' seconds for a license. If the value is -1 then the started tool will not wait for the next free license. Use a value of 0 to wait forever.
(The default value for this option is -1.)
(This option is only available for the rtl2zdb executable.)

-y

<libdir>

Read files matching the extension given with +libext+ from the specified directory as Verilog library files.

VDB Creation

The vhdl2vdb binary reads the given VHDL files and creates a binfile for later use by the RTL parser:

vhdl2vdb -vhdlLibPath /path/to/vdbdir <OPTIONS> <FILES>

The zvdb Tcl command reads the given VHDL files and creates a binfile for later use by the RTL parser:

zvdb -vhdlLibPath /path/to/vdbdir <OPTIONS> <FILES>

VDB Options

Option Parameters Description

Option	Parameters	Description
`-argsFromFile`	`<file>`	Read cmdline arguments from file.
`-breakOnError` \| `-breakOnErr`	`on\|off`	Stop on errors during parsing. (The default value for this option is `off`.)
`-connectByName`	`<netnamepattern>`	Connect matching net by name, i.e. don’t route it.
`-debugFlag`	`<flag>`	Enable a specific debug flag.
`-dontCut`		Don’t cut long filenames in messages.
`-help` \| `-h`		Print a help text with a short description of each option.
`-ignorePragmas`	`on\|off`	Ignore all Pragmas. (The default value for this option is `off`.)
`-ignoreTranslate`	`on\|off`	Ignore only Translate and Synthesis Pragmas. (The default value for this option is `off`.)
`-ignoreUnit`	`<unit>`	Do not elaborate the VHDL unit <unit>; any VHDL unit whose name matches <unit> case-insensitively will not be elaborated.
`-info`	`None\|Error\|Warning\|Verbose\|Debug`	Level of verbosity for issued messages. (The default value for this option is `Error`.)
`-library`	`<name>`	Parse all files following this option into a library with the given name.
`-logAppend`		Append to logfile.
`-logfile`	`<file>`	Generate log file.
`-maxErrCnt`	`<num>`	Set maximum number of errors that can occur before the parser stops reading the input file(s). (The default value for this option is `0`.)
`-nologo`		Print no greeting message.
`-pedantic`	`on\|off`	Toggle pedantic language checking mode (in relaxed mode some errors are just warnings and some warnings are suppressed). (The default value for this option is `on`.)
`-prog`		Print progress information.
`-renameSuffix`	`<suffix>`	Suffix for renaming duplicate cells.
`-resolveDuplicates`	`on\|off`	Resolve duplicate cells. If "off" all duplicate cells are renamed. (The default value for this option is `on`.)
`-spos`	`on\|off`	Create source code references. (The default value for this option is `on`.)
`-suppress`	`<type> <pattern>`	Suppress messages which match pattern.
`-time`		Print CPU time consumption (requires enabled progress updates).
`-topLibrary`	`<name>`	The library containing the top-level design.
`-unit`	`<name>`	Unit name for the following files.
`-vhdl2000`		Read RTL VHDL 2000.
`-vhdl2008`		Read RTL VHDL 2008.
`-vhdl2019`		Read RTL VHDL 2019.
`-vhdl87`		Read RTL VHDL 87.
`-vhdl93`		Read RTL VHDL 93.
`-vhdlLibPath`	`<dir>`	Look for and store precompiled VHDL libraries in <dir>.
`-wait_for_license` \| `-waitForLicense`	`<sec>`	Wait 'sec' seconds for a license. If the value is -1 then the started tool will not wait for the next free license. Use a value of 0 to wait forever. (The default value for this option is `-1`.)

-argsFromFile

<file>

Read cmdline arguments from file.

-breakOnError | -breakOnErr

on|off

Stop on errors during parsing.
(The default value for this option is off.)

-connectByName

<netnamepattern>

Connect matching net by name, i.e. don’t route it.

-debugFlag

<flag>

Enable a specific debug flag.

-dontCut

Don’t cut long filenames in messages.

-help | -h

Print a help text with a short description of each option.

-ignorePragmas

on|off

Ignore all Pragmas.
(The default value for this option is off.)

-ignoreTranslate

on|off

Ignore only Translate and Synthesis Pragmas.
(The default value for this option is off.)

-ignoreUnit

<unit>

Do not elaborate the VHDL unit <unit>; any VHDL unit whose name matches <unit> case-insensitively will not be elaborated.

-info

None|Error|Warning|Verbose|Debug

Level of verbosity for issued messages.
(The default value for this option is Error.)

-library

<name>

Parse all files following this option into a library with the given name.

-logAppend

Append to logfile.

-logfile

<file>

Generate log file.

-maxErrCnt

<num>

Set maximum number of errors that can occur before the parser stops reading the input file(s).
(The default value for this option is 0.)

-nologo

Print no greeting message.

-pedantic

on|off

Toggle pedantic language checking mode (in relaxed mode some errors are just warnings and some warnings are suppressed).
(The default value for this option is on.)

-prog

Print progress information.

-renameSuffix

<suffix>

Suffix for renaming duplicate cells.

-resolveDuplicates

on|off

Resolve duplicate cells. If "off" all duplicate cells are renamed.
(The default value for this option is on.)

-spos

on|off

Create source code references.
(The default value for this option is on.)

-suppress

<type> <pattern>

Suppress messages which match pattern.

-time

Print CPU time consumption (requires enabled progress updates).

-topLibrary

<name>

The library containing the top-level design.

-unit

<name>

Unit name for the following files.

-vhdl2000

Read RTL VHDL 2000.

-vhdl2008

Read RTL VHDL 2008.

-vhdl2019

Read RTL VHDL 2019.

-vhdl87

Read RTL VHDL 87.

-vhdl93

Read RTL VHDL 93.

-vhdlLibPath

<dir>

Look for and store precompiled VHDL libraries in <dir>.

-wait_for_license | -waitForLicense

<sec>

Wait 'sec' seconds for a license. If the value is -1 then the started tool will not wait for the next free license. Use a value of 0 to wait forever.
(The default value for this option is -1.)