The Spice Parser

This document describes the function of the software unit that reads a Spice file and stores its connectivity (with parameters) to the hierarchical database ZDB for later processing. It supports different Spice dialects and is not picky on syntax variances, but on the other side does not necessarily find/report all errors. The Spice parser can also save modified attributes back to the Spice file.

Introduction

In addition of using the SpiceVision PRO GUI to read Spice files either the stand alone binary spice2zdb or the Tcl command zspice can be used.

The spice2zdb binary reads the given Spice file and creates a binfile containing the connectivity of the input file:

spice2zdb -o binfile.zdb <OPTIONS> <FILE.SP>

The zspice Tcl command reads the given Spice file and returns the created in-memory database.

set db [zspice <OPTIONS> <FILE.SP>]

The Tcl command is available in the Console window of the SpiceVision PRO GUI.

This document describes the usage of this flow.

In addition to that, zspice also supports another mode for updating previously parsed Spice file(s) - as described in the section Save Attributes to Spice Files.

Options

Option Parameters Description

Option	Parameters	Description
`-addTopPorts`	`on\|off`	Add top I/O ports from connectivity. (The default value for this option is `on`.)
`-argsFromFile`	`<file>`	Read cmdline arguments from file.
`-autoExpand`	`on\|off`	Remove hierarchy if subckt has one device. (The default value for this option is `off`.)
`-autoExpand0`	`on\|off`	Remove hierarchy if subckt has no device. (The default value for this option is `off`.)
`-avoidShorted`	`on\|off`	Avoid shorted out ports and make them inout. (The default value for this option is `off`.)
`-binlib`	`<file>`	Open this binfile as a precompiled library.
`-breakOnError` \| `-breakOnErr`	`on\|off`	Stop on errors during parsing. (The default value for this option is `off`.)
`-bulk`	`wrong\|all\|none\|nopg`	Create net wires and display bulk connections. If the mode is `wrong` then only bulk connections at PMOS or PNP transistors are shown that are not connected to a power or negpower node. Bulk connections at NMOS or NPN transistors are shown that are not connected to a ground node. If the value is `all` then all bulk connections are shown. If the value is `none` then no bulk connections are shown. If the value is `nopg` then only bulks not connected to a power, negpower or ground node are shown. (The default value for this option is `wrong`.)
`-calibre`		Read the input file as a Calibre netlist.
`-cdl`		Read the input file as a CDL netlist.
`-connectByName`	`<netnamepattern>`	Connect matching net by name, i.e. don’t route it.
`-createdTop`	`<name>`	Name of the created top sub-circuit.
`-createHier`	`<sep>`	Create hierarchy from flat instance names. Split the instance names at the given hierarchy separator. If the given hierarchy separator character is an empty string then the hierarchy separator character is guessed.
`-debugFlag`	`<flag>`	Enable a specific debug flag.
`-definedevice`	`<subckt> <type> <portmappings>`	Define a subckt to be used as a device. In contrast to -subckt2dev here the port mapping defines the function of the ports.The port mappings consist of a comma separated list of pairs with the primitive port name and the function separated with an equal sign. E.g. -definedevice "nmos_macro" "NMOS" "s=SOURCE,b=BULK,d=DRAIN,g=GATE".
`-dontCut`		Don’t cut long filenames in messages.
`-duplSubckt`	`error\|warning\|ignore\|skip`	The value `error` will stop parsing and report an error message. The value `warning` will report a warning message, create the sub-circuit and continue parsing (the duplicate sub-circuit will be resolved later by the resolve duplicate operator). The value `ignore` will not report a warning message, create the sub-circuit and continue parsing (the duplicate sub-circuit will be resolved later by the resolve duplicate operator). The value `skip` will not create the sub-circuit, report an info message and continue parsing. (The default value for this option is `error`.)
`-eldo`		Read the input file as an Eldo netlist.
`-evalParams`	`on\|off`	Evaluate parameters. (The default value for this option is `off`.)
`-evalVsource2Input`	`on\|off`	Evaluate AC voltage sources to top input ports. (The default value for this option is `on`.)
`-evalVsource2Power`	`on\|off`	Evaluate DC voltage sources to power. (The default value for this option is `on`.)
`-expand`	`<circuit>`	Expand subckt after parser has finished.
`-forceLibrary`	`on\|off`	Input Spice file is interpreted as a library file. (The default value for this option is `off`.)
`-forceSymlib`		Overwrite existing symbols with the symbols from the given symbol library files (option -symlib).
`-ground`	`<node>`	Define global ground node (this option can be repeated multiple times).
`-groupMultiFinger`	`<sep>`	Group instances with same basename before given separator.
`-guessBus`	`<open> <close>`	Guess buses based on net and port names with a bit subscript enclosed in the given 'open' and 'close' characters.
`-guessInstArray`	`<open> <close>`	Guess instance arrays based on instance names with a bit subscript enclosed in the given 'open' and 'close' characters.
`-guessMacroModels`	`on\|off`	Guess macro model devices. (The default value for this option is `off`.)
`-guessPower`	`on\|off`	Guess power/ground nets connected to bulks. (The default value for this option is `off`.)
`-help` \| `-h`		Print a help text with a short description of each option.
`-hidePowerPorts`	`on\|off`	Hide subckt power/ground ports. (The default value for this option is `off`.)
`-hierSep`	`<hiersepchar>`	Set the desired hierarchy separator 'hiersepchar' of your choice. Any character can be used. To be able to identify the hierarchy separator, a character that is not already used in an identifier should be used.
`-hspice`		Read the input file as a HSpice netlist.
`-icomment`	`on\|off`	Add comments to instances. (The default value for this option is `off`.)
`-ignoreCaps`	`<limit>`	Ignore (remove) capacitors if the threshold value is lower or equal than the specified number (in Farad, Spice units accepted). Additionally a glob style model name prefixed by 'model:' can be used to ignore all instances of the specified model.
`-ignoreCase`	`on\|off`	Case-insensitive parser. (The default value for this option is `on`.)
`-ignoreDuplIncl`	`on\|off`	Ignore duplicate includes. (The default value for this option is `off`.)
`-incdir`	`<dir>`	Define an include directory (this option can be repeated multiple times).
`-info`	`None\|Error\|Warning\|Verbose\|Debug`	Level of verbosity for issued messages. (The default value for this option is `Error`.) (This option is only available for the `spice2zdb` executable.)
`-into`	`<dbname>`	Compile the given files into an already existing database. (This option is only available for the `zspice` command.)
`-layoutcomment`	`on\|off`	Add attributes for layout coordinates. (The default value for this option is `off`.)
`-logAppend`		Append to logfile.
`-logfile`	`<file>`	Generate log file. (This option is only available for the `spice2zdb` executable.)
`-ltspice`		Read the input file as an LTSpice netlist.
`-mergeParallel`	`on\|off`	Merge parallel transistors into one. (The default value for this option is `off`.)
`-mergeParallelCap`	`on\|off`	Merge parallel capacitors into one. (The default value for this option is `off`.)
`-mergeParallelDiode`	`on\|off`	Merge parallel diodes into one. (The default value for this option is `off`.)
`-mergeParallelEquality`	`<variation>`	Variation to treat device values as equal for the merge parallel options (enter a value between 0.0 and 1.0). (The default value for this option is `0.10`.)
`-mergeParallelInst`	`<cell> <attrs> <eqfunc> <grpfunc>`	Merge parallel instances of matching cells. Details are described here.
`-mergeParallelRes`	`on\|off`	Merge parallel resistors into one. (The default value for this option is `off`.)
`-mergeSerial`	`on\|off`	Merge serial transistors into one. (The default value for this option is `off`.)
`-mergeSerialCap`	`on\|off`	Merge serial capacitors into one. (The default value for this option is `off`.)
`-mergeSerialRes`	`on\|off`	Merge serial resistors into one. (The default value for this option is `off`.)
`-model`	`<model> <type>`	Define a model.
`-multi`	`<M>`	Name of the multiplier attribute for parallel devices (default is "M").
`-negPower`	`<node>`	Define global negpower node (this option can be repeated multiple times).
`-node`	`<subckt> <node> <type>`	Define input/output or power/ground node per subckt.
`-noHierSep`		Don’t search for a hierarchy separator.
`-noIncludes`		Don’t perform include commands.
`-nologo`		Print no greeting message.
`-o` \| `-out`	`<file>`	Name of the zdb output binfile. (This option is only available for the `spice2zdb` executable.)
`-power`	`<node>`	Define global power node (this option can be repeated multiple times).
`-prog`		Print progress information. (This option is only available for the `spice2zdb` executable.)
`-pspice`		Read the input file as a PSpice netlist.
`-pwrProp`	`down\|stop\|off`	Control power propagation of the Spice parser. Propagation of power can be turned off, go all the way down the hierarchy or stop if the name of the power node changes. (The default value for this option is `down`.)
`-range`	`<begin> <end>`	Define a range in the file to read.
`-recognize`	`on\|off`	Recognize transistors that form a gate. (The default value for this option is `off`.)
`-recognizeBox`	`on\|off`	Create box for non recognized groups. (The default value for this option is `off`.)
`-recognizeCreateSupply`	`on\|off`	Create supply ports on recognized gates. (The default value for this option is `off`.)
`-recognizeFold`	`nofold\|fold\|autofold\|noflat`	Fold recognized gates using one of the following methods: Use 'nofold' to disable folding, use 'fold' to fold all recognized gates, use 'autofold' to fold only recognized gates with equal attribute values and use 'noflat' to fold all recognized gates but do not create flat attributes. (The default value for this option is `autofold`.)
`-recognizeNoPar`	`on\|off`	Do not recognize gates with transistors in parallel paths. (The default value for this option is `off`.)
`-recognizeNoTran`	`on\|off`	Do not recognize transfer gates. (The default value for this option is `off`.)
`-removeCap`	`on\|off`	Remove capacitors connected to only one net. (The default value for this option is `off`.)
`-removeEmptyModule`	`on\|off`	Remove empty modules. (The default value for this option is `off`.)
`-removeLead`	`chars`	Remove leading chars from inst names.
`-removeMos`	`off\|on\|useless`	Remove spurious MOS transistors (e.g. if the gate pin is connected to power/ground, if all pins are dangling or shortened, etc.). `on` mode is more aggressive, while the `useless` mode is more conservative and produces warning messages instead of removing transistors in some cases. (The default value for this option is `off`.)
`-removeRes`	`on\|off`	Remove resistors connected to only one net. (The default value for this option is `off`.)
`-renameSuffix`	`<suffix>`	Suffix for renaming duplicate cells.
`-resolveDuplicates`	`on\|off`	Resolve duplicate cells. If "off" all duplicate cells are renamed. (The default value for this option is `on`.)
`-shortRes`	`<limit>`	Ignore (short-cut) resistors if the threshold value is lower or equal than the specified number (in Ohm, Spice units accepted). Additionally a glob style model name prefixed by 'model:' can be used to ignore all instances of the specified model.
`-spectre`		Read the input file as a Spectre netlist.
`-spice2`		Read the input file as a Spice2 netlist.
`-spice3`		Read the input file as a Spice3 netlist.
`-spiceDialect`	`spice2\|spice3\|pspice\|hspice\|calibre\|cdl\|spectre\|eldo\|ltspice`	Set the Spice dialect for the input file. (The default value for this option is `hspice`.)
`-spos`	`on\|off`	Create source code references. (The default value for this option is `on`.)
`-sposExclude`	`file\|line\|primitive\|module\|port\|inst\|pin\|net`	Exclude object from collection spos info
`-subckt2dev`	`<subckt> <type>`	Define a subckt to be used as a device. Ports must match the sequence defined for the function. E.g. -subckt2dev "nmos_macro" "NMOS".
`-suppress`	`<type> <pattern>`	Suppress messages which match pattern. (This option is only available for the `spice2zdb` executable.)
`-sym2zdb`		Preload symbol library file(s) given with the -symlib option.
`-symlib`	`<symlib>`	Specify a symbol library file.
`-threeTermDev`	`<pat>`	Define three term devices.
`-time`		Print CPU time consumption (requires enabled progress updates). (This option is only available for the `spice2zdb` executable.)
`-top`	`<name>`	Define this module as the top module. If * is set, then all unreferenced cells are used as top.
`-validate`		Validate DB before creating the zdb output file.
`-wait_for_license` \| `-waitForLicense`	`<sec>`	Wait 'sec' seconds for a license. If the value is -1 then the started tool will not wait for the next free license. Use a value of 0 to wait forever. (The default value for this option is `-1`.) (This option is only available for the `spice2zdb` executable.)

-addTopPorts

on|off

Add top I/O ports from connectivity.
(The default value for this option is on.)

-argsFromFile

<file>

Read cmdline arguments from file.

-autoExpand

on|off

Remove hierarchy if subckt has one device.
(The default value for this option is off.)

-autoExpand0

on|off

Remove hierarchy if subckt has no device.
(The default value for this option is off.)

-avoidShorted

on|off

Avoid shorted out ports and make them inout.
(The default value for this option is off.)

-binlib

<file>

Open this binfile as a precompiled library.

-breakOnError | -breakOnErr

on|off

Stop on errors during parsing.
(The default value for this option is off.)

-bulk

wrong|all|none|nopg

Create net wires and display bulk connections. If the mode is wrong then only bulk connections at PMOS or PNP transistors are shown that are not connected to a power or negpower node. Bulk connections at NMOS or NPN transistors are shown that are not connected to a ground node. If the value is all then all bulk connections are shown. If the value is none then no bulk connections are shown. If the value is nopg then only bulks not connected to a power, negpower or ground node are shown.
(The default value for this option is wrong.)

-calibre

Read the input file as a Calibre netlist.

-cdl

Read the input file as a CDL netlist.

-connectByName

<netnamepattern>

Connect matching net by name, i.e. don’t route it.

-createdTop

<name>

Name of the created top sub-circuit.

-createHier

<sep>

Create hierarchy from flat instance names. Split the instance names at the given hierarchy separator. If the given hierarchy separator character is an empty string then the hierarchy separator character is guessed.

-debugFlag

<flag>

Enable a specific debug flag.

-definedevice

<subckt> <type> <portmappings>

Define a subckt to be used as a device. In contrast to -subckt2dev here the port mapping defines the function of the ports.The port mappings consist of a comma separated list of pairs with the primitive port name and the function separated with an equal sign. E.g. -definedevice "nmos_macro" "NMOS" "s=SOURCE,b=BULK,d=DRAIN,g=GATE".

-dontCut

Don’t cut long filenames in messages.

-duplSubckt

error|warning|ignore|skip

The value error will stop parsing and report an error message. The value warning will report a warning message, create the sub-circuit and continue parsing (the duplicate sub-circuit will be resolved later by the resolve duplicate operator). The value ignore will not report a warning message, create the sub-circuit and continue parsing (the duplicate sub-circuit will be resolved later by the resolve duplicate operator). The value skip will not create the sub-circuit, report an info message and continue parsing.
(The default value for this option is error.)

-eldo

Read the input file as an Eldo netlist.

-evalParams

on|off

Evaluate parameters.
(The default value for this option is off.)

-evalVsource2Input

on|off

Evaluate AC voltage sources to top input ports.
(The default value for this option is on.)

-evalVsource2Power

on|off

Evaluate DC voltage sources to power.
(The default value for this option is on.)

-expand

<circuit>

Expand subckt after parser has finished.

-forceLibrary

on|off

Input Spice file is interpreted as a library file.
(The default value for this option is off.)

-forceSymlib

Overwrite existing symbols with the symbols from the given symbol library files (option -symlib).

-ground

<node>

Define global ground node (this option can be repeated multiple times).

-groupMultiFinger

<sep>

Group instances with same basename before given separator.

-guessBus

<open> <close>

Guess buses based on net and port names with a bit subscript enclosed in the given 'open' and 'close' characters.

-guessInstArray

<open> <close>

Guess instance arrays based on instance names with a bit subscript enclosed in the given 'open' and 'close' characters.

-guessMacroModels

on|off

Guess macro model devices.
(The default value for this option is off.)

-guessPower

on|off

Guess power/ground nets connected to bulks.
(The default value for this option is off.)

-help | -h

Print a help text with a short description of each option.

-hidePowerPorts

on|off

Hide subckt power/ground ports.
(The default value for this option is off.)

-hierSep

<hiersepchar>

Set the desired hierarchy separator 'hiersepchar' of your choice. Any character can be used. To be able to identify the hierarchy separator, a character that is not already used in an identifier should be used.

-hspice

Read the input file as a HSpice netlist.

-icomment

on|off

Add comments to instances.
(The default value for this option is off.)

-ignoreCaps

<limit>

Ignore (remove) capacitors if the threshold value is lower or equal than the specified number (in Farad, Spice units accepted). Additionally a glob style model name prefixed by 'model:' can be used to ignore all instances of the specified model.

-ignoreCase

on|off

Case-insensitive parser.
(The default value for this option is on.)

-ignoreDuplIncl

on|off

Ignore duplicate includes.
(The default value for this option is off.)

-incdir

<dir>

Define an include directory (this option can be repeated multiple times).

-info

None|Error|Warning|Verbose|Debug

Level of verbosity for issued messages.
(The default value for this option is Error.)
(This option is only available for the spice2zdb executable.)

-into

<dbname>

Compile the given files into an already existing database.
(This option is only available for the zspice command.)

-layoutcomment

on|off

Add attributes for layout coordinates.
(The default value for this option is off.)

-logAppend

Append to logfile.

-logfile

<file>

Generate log file.
(This option is only available for the spice2zdb executable.)

-ltspice

Read the input file as an LTSpice netlist.

-mergeParallel

on|off

Merge parallel transistors into one.
(The default value for this option is off.)

-mergeParallelCap

on|off

Merge parallel capacitors into one.
(The default value for this option is off.)

-mergeParallelDiode

on|off

Merge parallel diodes into one.
(The default value for this option is off.)

-mergeParallelEquality

<variation>

Variation to treat device values as equal for the merge parallel options (enter a value between 0.0 and 1.0).
(The default value for this option is 0.10.)

-mergeParallelInst

<cell> <attrs> <eqfunc> <grpfunc>

Merge parallel instances of matching cells. Details are described here.

-mergeParallelRes

on|off

Merge parallel resistors into one.
(The default value for this option is off.)

-mergeSerial

on|off

Merge serial transistors into one.
(The default value for this option is off.)

-mergeSerialCap

on|off

Merge serial capacitors into one.
(The default value for this option is off.)

-mergeSerialRes

on|off

Merge serial resistors into one.
(The default value for this option is off.)

-model

<model> <type>

Define a model.

-multi

<M>

Name of the multiplier attribute for parallel devices (default is "M").

-negPower

<node>

Define global negpower node (this option can be repeated multiple times).

-node

<subckt> <node> <type>

Define input/output or power/ground node per subckt.

-noHierSep

Don’t search for a hierarchy separator.

-noIncludes

Don’t perform include commands.

-nologo

Print no greeting message.

-o | -out

<file>

Name of the zdb output binfile.
(This option is only available for the spice2zdb executable.)

-power

<node>

Define global power node (this option can be repeated multiple times).

-prog

Print progress information.
(This option is only available for the spice2zdb executable.)

-pspice

Read the input file as a PSpice netlist.

-pwrProp

down|stop|off

Control power propagation of the Spice parser. Propagation of power can be turned off, go all the way down the hierarchy or stop if the name of the power node changes.
(The default value for this option is down.)

-range

<begin> <end>

Define a range in the file to read.

-recognize

on|off

Recognize transistors that form a gate.
(The default value for this option is off.)

-recognizeBox

on|off

Create box for non recognized groups.
(The default value for this option is off.)

-recognizeCreateSupply

on|off

Create supply ports on recognized gates.
(The default value for this option is off.)

-recognizeFold

nofold|fold|autofold|noflat

Fold recognized gates using one of the following methods: Use 'nofold' to disable folding, use 'fold' to fold all recognized gates, use 'autofold' to fold only recognized gates with equal attribute values and use 'noflat' to fold all recognized gates but do not create flat attributes.
(The default value for this option is autofold.)

-recognizeNoPar

on|off

Do not recognize gates with transistors in parallel paths.
(The default value for this option is off.)

-recognizeNoTran

on|off

Do not recognize transfer gates.
(The default value for this option is off.)

-removeCap

on|off

Remove capacitors connected to only one net.
(The default value for this option is off.)

-removeEmptyModule

on|off

Remove empty modules.
(The default value for this option is off.)

-removeLead

chars

Remove leading chars from inst names.

-removeMos

off|on|useless

Remove spurious MOS transistors (e.g. if the gate pin is connected to power/ground, if all pins are dangling or shortened, etc.). on mode is more aggressive, while the useless mode is more conservative and produces warning messages instead of removing transistors in some cases.
(The default value for this option is off.)

-removeRes

on|off

Remove resistors connected to only one net.
(The default value for this option is off.)

-renameSuffix

<suffix>

Suffix for renaming duplicate cells.

-resolveDuplicates

on|off

Resolve duplicate cells. If "off" all duplicate cells are renamed.
(The default value for this option is on.)

-shortRes

<limit>

Ignore (short-cut) resistors if the threshold value is lower or equal than the specified number (in Ohm, Spice units accepted). Additionally a glob style model name prefixed by 'model:' can be used to ignore all instances of the specified model.

-spectre

Read the input file as a Spectre netlist.

-spice2

Read the input file as a Spice2 netlist.

-spice3

Read the input file as a Spice3 netlist.

-spiceDialect

Set the Spice dialect for the input file.
(The default value for this option is hspice.)

-spos

on|off

Create source code references.
(The default value for this option is on.)

-sposExclude

Exclude object from collection spos info

-subckt2dev

<subckt> <type>

Define a subckt to be used as a device. Ports must match the sequence defined for the function. E.g. -subckt2dev "nmos_macro" "NMOS".

-suppress

<type> <pattern>

Suppress messages which match pattern.
(This option is only available for the spice2zdb executable.)

-sym2zdb

Preload symbol library file(s) given with the -symlib option.

-symlib

<symlib>

Specify a symbol library file.

-threeTermDev

<pat>

Define three term devices.

-time

Print CPU time consumption (requires enabled progress updates).
(This option is only available for the spice2zdb executable.)

-top

<name>

Define this module as the top module. If * is set, then all unreferenced cells are used as top.

-validate

Validate DB before creating the zdb output file.

-wait_for_license | -waitForLicense

<sec>

Wait 'sec' seconds for a license. If the value is -1 then the started tool will not wait for the next free license. Use a value of 0 to wait forever.
(The default value for this option is -1.)
(This option is only available for the spice2zdb executable.)

What the Spice Parser Does

The parser reads the input files twice. In the first pass subckt and model names are processed. The second pass handles instances and nodes. Details of the Spice parsing depends on the selected Spice dialect: one of SPICE2, SPICE3, PSPICE, HSPICE, CDL or Calibre, identified by "2", "3", "P", "H" or "C" respectively (see right-most column in the tables device types, Spice models, comments, control and sub-circuits below — a "*" is a wild-card that matches all dialects).

Most of the instance parameters are added as instance attributes (with identical names). Some special instance and cell attributes are created by the Spice parser, they are described in the section "Special Attributes Created by the Spice Parser" below.

Interpretation of Spice Device Types

Spice example	Created database objects	Dialect
Prim Name	Description
`R1 n1 n2 value`	_RES_	creates an instance of the built-in RES primitive called "_RES_". The given unnamed parameter value is added as instance attribute "R=value". If the value is less than 100 ohm the weakflow flag is set. If there is a TC parameter, two instance attributes are created, "TC1" storing the first value and "TC2" storing the second value.	*
`R1 n1 n2 model R=x`	model	creates an instance of a RES primitive called model with two pins. Parameters like R and TC are created as instance attributes, the TC parameter is handled as described above.	*
`C1 n1 n2 value`	_CAP_	creates an instance of the built-in CAP primitive called "_CAP_". The given unnamed parameter value is added as instance attribute "C=value". The TC parameter is handled as described at the R element above.	*
`C1 n1 n2 model C=x`	model	creates an instance of a CAP primitive called model with two pins. Parameters like C and TC are created as instance attributes, the TC parameter is handled as described above.	*
`L1 n1 n2 value`	_IND_	creates an instance of the built-in INDUCTOR primitive called "_IND_". The given unnamed parameter value is added as instance attribute "L=value". The TC parameter is handled as described at the R element above.	*
`L1 n1 n2 model L=x`	model	creates an instance of a INDUCTOR primitive called model with two pins. Parameters like L and TC are created as instance attributes, the TC parameter is handled as described above.	*
`K1 L1 L2 … Ln coef`	_COUPLED_	creates an instance of the built-in UNKNOWN primitive called "_COUPLED_" with no pins. The given coef parameter is added as attribute "#COUPLING=coef". The names of the coupled instances are stored in special attributes "$INST1", "$INST2" …	*
`K1 T1 T2 … Tn coef`	_COUPLED_	same as above, but for transmission lines.	P
`S1 sp sn cp cn model`	model	creates an instance of the built-in SWITCH primitive with four pins.	*
`S1 n1 n2 … nn mname=model`	model-n	creates an instance of the built-in UNKNOWN primitive with the given number of pins. The primitive name is a concatenation of the given mname and the number of pins.	H
`W1 pn nn Vn model`	model	creates an instance of a SWITCH primitive called model with two pins. A special attribute "$CTRL=Vn" is added to the instance to refer to the voltage source.	23PC
`W1 i1 i2 .. o1 o2 .. Umodel=model`	model-n	creates an instance of a UNKNOWN primitive called "model-n", where n is the number of pins.	H
`W1 i1 i2 .. o1 o2 .. RFGCfile=file`	file-n	creates an instance of a UNKNOWN primitive called "file-n", where n is the number of pins.	H
`V1 pn nn DC 1.2 V1 pn nn AC`	_VSOURCE_	creates an instance of the built-in VSOURCE primitive called "_VSOURCE_". A special attribute "$PARAM" will contain all parameters following the two nodes. A "#VOLTAGE" will be added, if the source is identified as a DC voltage source (if the param string has the form "DC 1.2" or "1.2"). A "#GUESSPWR" will be added with a score value between 0 and 100 (how safe the guessing is).	*
`I1 pn nn params`	_ISOURCE_	creates an instance of the built-in ISOURCE primitive called "_ISOURCE_" or - if the value of the source is "0.0" then "_ZEROISOURCE_". A special attribute "$PARAM=params" will be added, containing all parameters following the two nodes.	*
`G1 sp sn cp cn`	_VISOURCE_	creates an instance of the built-in ISOURCE primitive called "_VISOURCE_".	*
`G1 sp sn POLY(k) n1 n2 …`	_VISOURCE_-n	creates an instance of the built-in ISOURCE primitive called "_VISOURCE_-n". The integer n is used to determine the number of pins (n = 2k+2).	*
`G1 sp sn CUR='…'`	_ISOURCEB_	creates an instance of the built-in ISOURCE primitive called "_ISOURCEB_".	*
`G1 sp sn DELAY G1 sp sn DELAY n1 n2`	_VISOURCE DELAY_	creates an instance of the built-in ISOURCE primitive called "_VISOURCEDELAY_" with four pins.	*
`G1 sp sn PWL(k) … G1 sp sn NPWL(k) … G1 sp sn PPWL(k) …`	_PWLISRC_f_-n	creates an instance of the built-in UNKNOWN primitive called "_PWLISRC_f_-n". The f is one of PWL, NPWL or PPWL depending on the function. The integer n is used to determine the number of node pairs which follow (n = 2k+2).	H
`G1 sp sn AND … G1 sp sn NAND … G1 sp sn OR … G1 sp sn NOR …`	_ISOURCE_f_-n	creates an instance of the built-in UNKNOWN primitive called "_ISOURCE_f_-n". The f is one of AND, NAND, OR, NOR depending on the function. The integer n is used to determine the number of node pairs which follow.	H
`G1 sp sn VALUE … G1 sp sn TABLE … G1 sp sn LAPLACE … G1 sp sn FREQ … G1 sp sn CHEBYSHEV`	_ISOURCE_	creates an instance of the built-in ISOURCE primitive called "_ISOURCE_". A special attribute "$PARAM" will contain the keyword (VALUE, TABLE, etc).	P
`E1 PWL(k) sp sn cp1 cn1 …`	_PWLVSRC_-n	creates an instance of the built-in UNKNOWN primitive called "_PWLVSRC_-n". The integer n is used to determine the number of pins (n = 2k+2).	H
`E1 sp sn AND … E1 sp sn NAND … E1 sp sn OR … E1 sp sn NOR …`	_VSOURCE_f_-n	creates an instance of the built-in UNKNOWN primitive called "_VSOURCE_f_-n". The f is one of AND, NAND, OR, NOR depending on the function. The integer n is used to determine the number of node pairs which follow.	H
`E1 sp sn cp cn`	_VVSOURCE_	creates an instance of the built-in VSOURCE primitive called "_VVSOURCE_".	*
`E1 sp sn POLY(k) n1 n2 …`	_VVSOURCE_-n	creates an instance of the built-in VSOURCE primitive called "_VVSOURCE_-n". The integer n is used to determine the number of pins (n = 2k+2).	*
`E1 sp sn VALUE … E1 sp sn TABLE … E1 sp sn LAPLACE … E1 sp sn FREQ … E1 sp sn CHEBYSHEV`	_VSOURCE_	creates an instance of the built-in VSOURCE primitive called "_VSOURCE_". A special attribute "$PARAM" will contain the keyword (VALUE, TABLE, etc).	P
`F1 pn nn V1 gain1 F1 pn nn POLY(n) V1 .. Vn gain1 .. gainn F1 pn nn PWL(n) V1 .. Vn gain1 .. gainn F1 pn nn AND(n) V1 .. Vn gain1 .. gainn F1 pn nn NAND(n) V1 .. Vn gain1 .. gainn F1 pn nn OR(n) V1 .. Vn gain1 .. gainn F1 pn nn NOR(n) V1 .. Vn gain1 .. gainn F1 pn nn DELAY V1`	creates an instance of the built-in ISOURCE primitive called "_IISOURCE_" or "\_IISOURCE_f". The f is one of "POLY", "PWL", "AND", "NAND", "OR", "NOR" or "_DELAY". The special attributes "$CTRL=V1..Vn" and "#GAIN=gain1..gainn" will be added.	*
`H1 pn nn V1 trans1 H1 pn nn POLY(n) V1 .. Vn trans1 .. transn H1 pn nn PWL(n) V1 .. Vn trans1 .. transn H1 pn nn AND(n) V1 .. Vn trans1 .. transn H1 pn nn NAND(n) V1 .. Vn trans1 .. transn H1 pn nn OR(n) V1 .. Vn trans1 .. transn H1 pn nn NOR(n) V1 .. Vn trans1 .. transn H1 pn nn DELAY V1`	creates an instance of the built-in VSOURCE primitive called "_IVSOURCE_" or "\_IVSOURCE_f". The f is one of "POLY", "PWL", "AND", "NAND", "OR", "NOR" or "_DELAY". The special attributes "$CTRL=V1..Vn" and "#TRANS=trans1..transn" will be added.	*
`T1 i0 i1 o0 o1 value`	_TRANS_	creates an instance of the built-in TRANSLINE primitive called "_TRANS_". The given unnamed parameter value is added as instance attribute "LEN=value".	*
`T1 i0 i1 o0 o1 model`	model	creates an instance of the built-in TRANSLINE primitive.	*
`O1 i0 i1 o0 o1 model`	model	creates an instance of the built-in TRANSLINE primitive.	23HC
`U1 AND(2) p g i1 i2 o s_mod io_std U1 ANDA(3,2) p g ia1 ia2 ia3 ib1 ib2 ib3 oa ob s_mod io_std`	The digital devices of pspice generate the corresponding primitive and instance. All pspice digital devices are supported.	P
`U1 i0 i1 o0 o1 … model`	model-n	creates an instance of the built-in UNKNOWN primitive called "model-n". Where n is the number of nodes.	H
`U1 i o g model`	model	creates an instance with three pins. The primitive function is UDRC.	23C
`B1 p1 p2 … file=fname model=model`	type IBIS-n	The given ibis file is searched in the include path and opened. The model is searched in that ibis file. If not found, "IBIS-n" is used, where n is the number of pins. If found, then the found type is used.	H
`B1 d g s model value`	model	creates an instance with three pins. The given unnamed parameter value is added as instance attribute "AREA=value".	P
`B1 p n I='cos(..)'`	_DISOURCE_	creates an instance of the built-in ISOURCE primitive called "_DISOURCE_". A special attribute "$PARAM" will contain all parameters following the two nodes.	23C
`B1 p n V='cos(..)'`	_DVSOURCE_	creates an instance of the built-in VSOURCE primitive called "_DVSOURCE_". A special attribute "$PARAM" will contain all parameters following the two nodes.	23C
`D1 n0 n1 model value`	model	creates an instance with two pins. The given unnamed parameter value is added as instance attribute "AREA=value".	*
`Q1 c b e model value Q1 c b e s model value`	model	creates an instance with four pins. If no substrate node is given "0" is used. In pspice square brackets around the substrate node are removed. The given unnamed parameter value is added as instance attribute "AREA=value".	*
`J1 d g s model value`	model	creates an instance with three pins. The given unnamed parameter value is added as instance attribute "AREA=value".	*
`M1 d g s b model L=1 W=2`	model	creates an instance with four pins. If the W / L ration is less than 1.0 the weakflow flag is set.	*
`M1 d g s model L=1 W=2`	model	in Hspice the bulk pin is optional. If present it is handled like above else the 4th pin is connected to the net "0", or the net mentioned in the "BULK" attribute of the referenced model. Unnamed parameter values are assigned to the two instance attributes "L" and "W". If the .OPTION WL is found, the values are swapped.	H
`Z1 c g e model`	model	creates an instance of a NPN primitive called model with three pins.	P
`Z1 d g s model`	model	creates an instance of a NMOS or PMOS primitive called model with three pins.	23HC

Spice example

Created database objects

Dialect

Prim Name

Description

R1 n1 n2 value

_RES_

creates an instance of the built-in RES primitive called "_RES_". The given unnamed parameter value is added as instance attribute "R=value". If the value is less than 100 ohm the weakflow flag is set. If there is a TC parameter, two instance attributes are created, "TC1" storing the first value and "TC2" storing the second value.

R1 n1 n2 model R=x

model

creates an instance of a RES primitive called model with two pins. Parameters like R and TC are created as instance attributes, the TC parameter is handled as described above.

C1 n1 n2 value

_CAP_

creates an instance of the built-in CAP primitive called "_CAP_". The given unnamed parameter value is added as instance attribute "C=value". The TC parameter is handled as described at the R element above.

C1 n1 n2 model C=x

model

creates an instance of a CAP primitive called model with two pins. Parameters like C and TC are created as instance attributes, the TC parameter is handled as described above.

L1 n1 n2 value

_IND_

creates an instance of the built-in INDUCTOR primitive called "_IND_". The given unnamed parameter value is added as instance attribute "L=value". The TC parameter is handled as described at the R element above.

L1 n1 n2 model L=x

model

creates an instance of a INDUCTOR primitive called model with two pins. Parameters like L and TC are created as instance attributes, the TC parameter is handled as described above.

K1 L1 L2 … Ln coef

_COUPLED_

creates an instance of the built-in UNKNOWN primitive called "_COUPLED_" with no pins. The given coef parameter is added as attribute "#COUPLING=coef". The names of the coupled instances are stored in special attributes "$INST1", "$INST2" …

K1 T1 T2 … Tn coef

_COUPLED_

same as above, but for transmission lines.

S1 sp sn cp cn model

model

creates an instance of the built-in SWITCH primitive with four pins.

S1 n1 n2 … nn mname=model

model-n

creates an instance of the built-in UNKNOWN primitive with the given number of pins. The primitive name is a concatenation of the given mname and the number of pins.

W1 pn nn Vn model

model

creates an instance of a SWITCH primitive called model with two pins. A special attribute "$CTRL=Vn" is added to the instance to refer to the voltage source.

23PC

W1 i1 i2 .. o1 o2 .. Umodel=model

model-n

creates an instance of a UNKNOWN primitive called "model-n", where n is the number of pins.

W1 i1 i2 .. o1 o2 .. RFGCfile=file

file-n

creates an instance of a UNKNOWN primitive called "file-n", where n is the number of pins.

V1 pn nn DC 1.2 V1 pn nn AC

_VSOURCE_

creates an instance of the built-in VSOURCE primitive called "_VSOURCE_". A special attribute "$PARAM" will contain all parameters following the two nodes. A "#VOLTAGE" will be added, if the source is identified as a DC voltage source (if the param string has the form "DC 1.2" or "1.2"). A "#GUESSPWR" will be added with a score value between 0 and 100 (how safe the guessing is).

I1 pn nn params

_ISOURCE_

creates an instance of the built-in ISOURCE primitive called "_ISOURCE_" or - if the value of the source is "0.0" then "_ZEROISOURCE_". A special attribute "$PARAM=params" will be added, containing all parameters following the two nodes.

G1 sp sn cp cn

_VISOURCE_

creates an instance of the built-in ISOURCE primitive called "_VISOURCE_".

G1 sp sn POLY(k) n1 n2 …

_VISOURCE_-n

creates an instance of the built-in ISOURCE primitive called "_VISOURCE_-n". The integer n is used to determine the number of pins (n = 2k+2).

G1 sp sn CUR='…'

_ISOURCEB_

creates an instance of the built-in ISOURCE primitive called "_ISOURCEB_".

G1 sp sn DELAY G1 sp sn DELAY n1 n2

_VISOURCE
DELAY_

creates an instance of the built-in ISOURCE primitive called "_VISOURCEDELAY_" with four pins.

G1 sp sn PWL(k) … G1 sp sn NPWL(k) … G1 sp sn PPWL(k) …

_PWLISRC_f_-n

creates an instance of the built-in UNKNOWN primitive called "_PWLISRC_f_-n". The f is one of PWL, NPWL or PPWL depending on the function. The integer n is used to determine the number of node pairs which follow (n = 2k+2).

G1 sp sn AND … G1 sp sn NAND … G1 sp sn OR … G1 sp sn NOR …

_ISOURCE_f_-n

creates an instance of the built-in UNKNOWN primitive called "_ISOURCE_f_-n". The f is one of AND, NAND, OR, NOR depending on the function. The integer n is used to determine the number of node pairs which follow.

G1 sp sn VALUE … G1 sp sn TABLE … G1 sp sn LAPLACE … G1 sp sn FREQ … G1 sp sn CHEBYSHEV

_ISOURCE_

creates an instance of the built-in ISOURCE primitive called "_ISOURCE_". A special attribute "$PARAM" will contain the keyword (VALUE, TABLE, etc).

E1 PWL(k) sp sn cp1 cn1 …

_PWLVSRC_-n

creates an instance of the built-in UNKNOWN primitive called "_PWLVSRC_-n". The integer n is used to determine the number of pins (n = 2k+2).

E1 sp sn AND … E1 sp sn NAND … E1 sp sn OR … E1 sp sn NOR …

_VSOURCE_f_-n

creates an instance of the built-in UNKNOWN primitive called "_VSOURCE_f_-n". The f is one of AND, NAND, OR, NOR depending on the function. The integer n is used to determine the number of node pairs which follow.

E1 sp sn cp cn

_VVSOURCE_

creates an instance of the built-in VSOURCE primitive called "_VVSOURCE_".

E1 sp sn POLY(k) n1 n2 …

_VVSOURCE_-n

creates an instance of the built-in VSOURCE primitive called "_VVSOURCE_-n". The integer n is used to determine the number of pins (n = 2k+2).

E1 sp sn VALUE … E1 sp sn TABLE … E1 sp sn LAPLACE … E1 sp sn FREQ … E1 sp sn CHEBYSHEV

_VSOURCE_

creates an instance of the built-in VSOURCE primitive called "_VSOURCE_". A special attribute "$PARAM" will contain the keyword (VALUE, TABLE, etc).

F1 pn nn V1 gain1 F1 pn nn POLY(n) V1 .. Vn gain1 .. gainn F1 pn nn PWL(n) V1 .. Vn gain1 .. gainn F1 pn nn AND(n) V1 .. Vn gain1 .. gainn F1 pn nn NAND(n) V1 .. Vn gain1 .. gainn F1 pn nn OR(n) V1 .. Vn gain1 .. gainn F1 pn nn NOR(n) V1 .. Vn gain1 .. gainn F1 pn nn DELAY V1

creates an instance of the built-in ISOURCE primitive called "_IISOURCE_" or "\_IISOURCE_f". The f is one of "POLY", "PWL", "AND", "NAND", "OR", "NOR" or "_DELAY". The special attributes "$CTRL=V1..Vn" and "#GAIN=gain1..gainn" will be added.

H1 pn nn V1 trans1 H1 pn nn POLY(n) V1 .. Vn trans1 .. transn H1 pn nn PWL(n) V1 .. Vn trans1 .. transn H1 pn nn AND(n) V1 .. Vn trans1 .. transn H1 pn nn NAND(n) V1 .. Vn trans1 .. transn H1 pn nn OR(n) V1 .. Vn trans1 .. transn H1 pn nn NOR(n) V1 .. Vn trans1 .. transn H1 pn nn DELAY V1

creates an instance of the built-in VSOURCE primitive called "_IVSOURCE_" or "\_IVSOURCE_f". The f is one of "POLY", "PWL", "AND", "NAND", "OR", "NOR" or "_DELAY". The special attributes "$CTRL=V1..Vn" and "#TRANS=trans1..transn" will be added.

T1 i0 i1 o0 o1 value

_TRANS_

creates an instance of the built-in TRANSLINE primitive called "_TRANS_". The given unnamed parameter value is added as instance attribute "LEN=value".

T1 i0 i1 o0 o1 model

model

creates an instance of the built-in TRANSLINE primitive.

O1 i0 i1 o0 o1 model

model

creates an instance of the built-in TRANSLINE primitive.

23HC

U1 AND(2) p g i1 i2 o s_mod io_std U1 ANDA(3,2) p g ia1 ia2 ia3 ib1 ib2 ib3 oa ob s_mod io_std

The digital devices of pspice generate the corresponding primitive and instance. All pspice digital devices are supported.

U1 i0 i1 o0 o1 … model

model-n

creates an instance of the built-in UNKNOWN primitive called "model-n". Where n is the number of nodes.

U1 i o g model

model

creates an instance with three pins. The primitive function is UDRC.

23C

B1 p1 p2 … file=fname model=model

type
IBIS-n

The given ibis file is searched in the include path and opened. The model is searched in that ibis file. If not found, "IBIS-n" is used, where n is the number of pins. If found, then the found type is used.

B1 d g s model value

model

creates an instance with three pins. The given unnamed parameter value is added as instance attribute "AREA=value".

B1 p n I='cos(..)'

_DISOURCE_

creates an instance of the built-in ISOURCE primitive called "_DISOURCE_". A special attribute "$PARAM" will contain all parameters following the two nodes.

23C

B1 p n V='cos(..)'

_DVSOURCE_

creates an instance of the built-in VSOURCE primitive called "_DVSOURCE_". A special attribute "$PARAM" will contain all parameters following the two nodes.

23C

D1 n0 n1 model value

model

creates an instance with two pins. The given unnamed parameter value is added as instance attribute "AREA=value".

Q1 c b e model value Q1 c b e s model value

model

creates an instance with four pins. If no substrate node is given "0" is used. In pspice square brackets around the substrate node are removed. The given unnamed parameter value is added as instance attribute "AREA=value".

J1 d g s model value

model

creates an instance with three pins. The given unnamed parameter value is added as instance attribute "AREA=value".

M1 d g s b model L=1 W=2

model

creates an instance with four pins. If the W / L ration is less than 1.0 the weakflow flag is set.

M1 d g s model L=1 W=2

model

in Hspice the bulk pin is optional. If present it is handled like above else the 4th pin is connected to the net "0", or the net mentioned in the "BULK" attribute of the referenced model. Unnamed parameter values are assigned to the two instance attributes "L" and "W". If the .OPTION WL is found, the values are swapped.

Z1 c g e model

model

creates an instance of a NPN primitive called model with three pins.

Z1 d g s model

model

creates an instance of a NMOS or PMOS primitive called model with three pins.

23HC

Interpretation of Spice Models

Each ".MODEL" creates a primitive with the given name. If the model is nested in subckts a unique name is created by prepending the subckt names separated by dots. The given type determines the primitive function used. Additional parameter are used to create attributes at the primitive.

At the end of parsing references from the instances to these models are resolved by using the model name given at the instance element. If no model is found, a warning is generated and a primitive function is guessed by looking a the element type and, if needed, by searching a 'P' or 'N' in the model name. The guessed primitive is created.

Model type	Created database objects	D
D	Creates a Diode or, if the BV attribute is less than 100 a ZDiode primitive.	*
R RES	Creates a Resistor primitive.	*
C CAP	Creates a Capacitor primitive.	*
NPN	Creates a NPN primitive.	*
PNP LPNP	Creates a PNP primitive.	*
NMF NJF GASFET	Creates a three pin NMOS primitive.	*
NIGBT	Creates a three pin NPN primitive.	*
PMF PJF	Creates a three pin PMOS primitive.	*
NMOS	Creates a four pin NMOS primitive.	*
PMOS	Creates a four pin PMOS primitive.	*
SW VSWITCH	Creates a SWITCH primitive.	*
CSW ISWITCH	Creates a SWITCH primitive.	*
LTRA TRN	Creates a TRANSLINE primitive.	*
UDRC	Creates a UDRCLINE primitive.	*
IND L	Creates a IND primitive.	*
AMP	Depending on the presence of a "COMP" parameter a AMP primitive with five or seven pins is created.	*

Model type

Created database objects

Creates a Diode or, if the BV attribute is less than 100 a ZDiode primitive.

R
RES

Creates a Resistor primitive.

C
CAP

Creates a Capacitor primitive.

NPN

Creates a NPN primitive.

PNP
LPNP

Creates a PNP primitive.

NMF
NJF
GASFET

Creates a three pin NMOS primitive.

NIGBT

Creates a three pin NPN primitive.

PMF
PJF

Creates a three pin PMOS primitive.

NMOS

Creates a four pin NMOS primitive.

PMOS

Creates a four pin PMOS primitive.

SW
VSWITCH

Creates a SWITCH primitive.

CSW
ISWITCH

Creates a SWITCH primitive.

LTRA
TRN

Creates a TRANSLINE primitive.

UDRC

Creates a UDRCLINE primitive.

IND
L

Creates a IND primitive.

AMP

Depending on the presence of a "COMP" parameter a AMP primitive with five or seven pins is created.

Interpretation of Spice Comments and Logical Lines

Spice example SPICE Parser Behavior D

Spice example	SPICE Parser Behavior	D
`* comment`	Lines beginning with '*' are ignored in Spice2 and Spice3.	23
`R1 1 2 +100`	Lines beginning with '+' continue lines but not comments in Spice2, Spice3, CDL and Calibre.	23C
`* comment R1 1 2 100 $comment`	Lines beginning with '*' or after '$' are treated like blanks in Hspice. Leading tabs and blanks are ignored.	H
`R1 1 2 * comment +RES`	Lines beginning with '+' continue lines. Comment lines in between are ignored in HSpice and PSpice.	HP
`R1 1 2 \ RES`	Lines ending with a backslash continue lines in HSpice.	H
`* comment R1 1 2 100 ;comment`	Lines beginning with '*' or after ';' are treated like blanks in Pspice. Leading blanks are ignored.	P
`* comment R1 1 2 100 $ comment`	Lines beginning with '*' or after '$' followed by a blank are treated like blanks in CDL and Calibre.	C
`Comment +Comment`	Comment lines can be continued with '*+' in CDL and Calibre.	C
`*.<CONTROL_STATEMENT>`	Control Statements can start with a comment in CDL and Calibre.	*

* comment

Lines beginning with '*' are ignored in Spice2 and Spice3.

R1 1 2 +100

Lines beginning with '+' continue lines but not comments in Spice2, Spice3, CDL and Calibre.

23C

* comment R1 1 2 100 $comment

Lines beginning with '*' or after '$' are treated like blanks in Hspice. Leading tabs and blanks are ignored.

R1 1 2 * comment +RES

Lines beginning with '+' continue lines. Comment lines in between are ignored in HSpice and PSpice.

R1 1 2 \ RES

Lines ending with a backslash continue lines in HSpice.

* comment R1 1 2 100 ;comment

Lines beginning with '*' or after ';' are treated like blanks in Pspice. Leading blanks are ignored.

* comment R1 1 2 100 $ comment

Lines beginning with '*' or after '$' followed by a blank are treated like blanks in CDL and Calibre.

*Comment *+Comment

Comment lines can be continued with '*+' in CDL and Calibre.

*.<CONTROL_STATEMENT>

Control Statements can start with a comment in CDL and Calibre.

Interpretation of Spice Control Statements

Spice example	Description	D
.INCLUDE 'fname'	Parses the named file. If the given filename is relative it is searched in the following directories: '-incdir' option, the base directory of the current file, the base directory of the main file and the current working directory.	*
.LIB 'fname' entry .ENDL	Same as .INCLUDE, but source lines outside matching .LIB and .ENDL are ignored.	*
.ALTER	Because the database can only store one alternative, everything after .ALTER is ignored and a warning is issued.	*
.CONNECT n1 n2 *.CONNECT n1 n2	The two given nets get merged at the end of the subckt processing.	*
.DATA … .ENDDATA	Everything between these control statements is currently ignored by the spice parser.	*
.END	Everything after .END is ignored. This control statement must be in the main file. If it occurs in an included file a warning message is generated by the parser.	*
.GLOBAL n1 … *.GLOBAL n1 …	All listed node names are added to the list of global nets. In PSpice node names beginning with "$G_" are added automatically to the list of globals. "0", "GND" (Spice3,HSpice,PSpice,CDL), "GND!" and "GROUND" (HSpice) are automatically added to the list of ground nets. In CDL and Calibre an optionally appended ":"-modifier is currently ignored.	*
.IF … .ELSEIF .ELSE .ENDIF	A conditional Spice netlist is currently only supported for constant expressions. The parser will issue a warning, when this control statement occurs in the input stream without a constant expression.	*
.MODEL name type	Creates a primitive with the given name. The interpretation of the type can be found in the Interpretation of Spice Models.	*
.OPTION WL	Changes the order of unnamed parameters at the M elements.	*
.OPTION PARHIER=local	Changes the default priority of the '-evalParams' parameter evaluation.	*
.PARAM name[=value]	All parameters and the optionally values are converted into attributes of the current subckt. Top-level parameters are added to the top-level "sub-circuit". Repeated .PARAM control statements with same name on same subckt level overwrite previous values.	*
*.PININFO n1:I n2:O n3:B …	Searches the ports of the current subckt and sets the direction to In, Out or Inout.	*
.PROTECT… .UNPROT	All lines between these control statements are ignored, because decryption is not supported by the current parser. If the .UNPROT can’t be seen by the parser, because it is hidden in the protected source lines, the first recognized control statement will switch back to unprotected mode.	*

Spice example

Description

.INCLUDE 'fname'

Parses the named file. If the given filename is relative it is searched in the following directories: '-incdir' option, the base directory of the current file, the base directory of the main file and the current working directory.

.LIB 'fname' entry
.ENDL

Same as .INCLUDE, but source lines outside matching .LIB and .ENDL are ignored.

.ALTER

Because the database can only store one alternative, everything after .ALTER is ignored and a warning is issued.

.CONNECT n1 n2
*.CONNECT n1 n2

The two given nets get merged at the end of the subckt processing.

.DATA …
.ENDDATA

Everything between these control statements is currently ignored by the spice parser.

.END

Everything after .END is ignored. This control statement must be in the main file. If it occurs in an included file a warning message is generated by the parser.

.GLOBAL n1 …
*.GLOBAL n1 …

All listed node names are added to the list of global nets. In PSpice node names beginning with "$G_" are added automatically to the list of globals. "0", "GND" (Spice3,HSpice,PSpice,CDL), "GND!" and "GROUND" (HSpice) are automatically added to the list of ground nets. In CDL and Calibre an optionally appended ":"-modifier is currently ignored.

.IF …
.ELSEIF
.ELSE
.ENDIF

A conditional Spice netlist is currently only supported for constant expressions. The parser will issue a warning, when this control statement occurs in the input stream without a constant expression.

.MODEL name type

Creates a primitive with the given name. The interpretation of the type can be found in the Interpretation of Spice Models.

.OPTION WL

Changes the order of unnamed parameters at the M elements.

.OPTION PARHIER=local

Changes the default priority of the '-evalParams' parameter evaluation.

.PARAM name[=value]

All parameters and the optionally values are converted into attributes of the current subckt. Top-level parameters are added to the top-level "sub-circuit". Repeated .PARAM control statements with same name on same subckt level overwrite previous values.

*.PININFO n1:I n2:O n3:B …

Searches the ports of the current subckt and sets the direction to In, Out or Inout.

.PROTECT…
.UNPROT

All lines between these control statements are ignored, because decryption is not supported by the current parser. If the .UNPROT can’t be seen by the parser, because it is hidden in the protected source lines, the first recognized control statement will switch back to unprotected mode.

Interpretation of Spice Sub-Circuits

Spice example Created database objects D

Spice example	Created database objects	D
`.SUBCKT name p1 p2 … A=x B=y .ENDS or .MACRO name p1 p2 … A=x B=y .EOM`	Creates a sub-circuit with ports p1, p2, etc. All given parameters (here: A, B) are stored at the sub-circuit.	*
`.SUBCKT name o1 o2… / i1 i2… .ENDS`	Same as normal .SUBCKT, but ports before the slash ('/') are marked as outputs, ports after the slash are marked as inputs.	C
`X1 n1 n2 … name A=1 B=2 …`	Creates an instance with pins connected to the listed nodes. The referenced subckt is resolved by using "name". Attributes following name are added to the instance (see notes).	23H
`X1 n1 n2 … name PARAMS: A=1 …`	Creates an instance with pins connected to the listed nodes. The referenced subckt is resolved by using "name". Attributes following PARAMS: are added to the instance (see notes).	P
`X1 o1 o2… / i1 i2… name A=1 B=2 …`	Creates an instance with pins connected to the listed nodes. The referenced subckt is resolved by using "name". Attributes following name are added to the instance (see notes).	C
`X1 name $PIN p1=n1 p2=n2 …`	Creates an instance with pins connected to the listed nodes. The referenced subckt is resolved by using "name". Connectivity is created by searching the named ports instead of the normal connection by sequence order (see notes).	C

.SUBCKT name p1 p2 … A=x B=y .ENDS or .MACRO name p1 p2 … A=x B=y .EOM

Creates a sub-circuit with ports p1, p2, etc. All given parameters (here: A, B) are stored at the sub-circuit.

.SUBCKT name o1 o2… / i1 i2… .ENDS

Same as normal .SUBCKT, but ports before the slash ('/') are marked as outputs, ports after the slash are marked as inputs.

X1 n1 n2 … name A=1 B=2 …

Creates an instance with pins connected to the listed nodes. The referenced subckt is resolved by using "name". Attributes following name are added to the instance (see notes).

23H

X1 n1 n2 … name PARAMS: A=1 …

Creates an instance with pins connected to the listed nodes. The referenced subckt is resolved by using "name". Attributes following PARAMS: are added to the instance (see notes).

X1 o1 o2… / i1 i2… name A=1 B=2 …

Creates an instance with pins connected to the listed nodes. The referenced subckt is resolved by using "name". Attributes following name are added to the instance (see notes).

X1 name $PIN p1=n1 p2=n2 …

Creates an instance with pins connected to the listed nodes. The referenced subckt is resolved by using "name". Connectivity is created by searching the named ports instead of the normal connection by sequence order (see notes).

Notes for sub-circuit instances: If the name refers to

a subckt which has less ports than the instance line, surplus pins are ignored and a warning is issued.
a subckt which has more ports than the instance line, surplus pins are left unconnected and a warning is issued.
a subckt which is not declared elsewhere, a blackbox is created and a warning is issued.
an undeclared subckt, then a file like name.inc is searched in the directories defined by the -incdir search path [HSpice only].
an AMP model, the AMP primitive is instantiated instead of a sub-circuit [HSpice only].

Special Attributes Created by the Spice Parser

Depending on the Spice device types some special attributes are created to store information from the Spice file that cannot easily be stored elsewhere. As a general rule, non-numerical attributes (e.g. string values), that do not need optional parameter evaluation get a '$' prefix. Numerical attributes that do not need optional parameter evaluation get a '#' prefix. Cell attributes to control the display of other attributes (meta attributes) get a '@' prefix.

Special attribute	Object	Description
AREA	inst	unnamed value of D, Q, J, B, Z, M element.
C	inst	unnamed or renamed 'VALUE' attribute of C element. Used to ignore small capacitors with -ignoreCaps option.
$CONSISTINGOF	inst	instance names of transistors merged by -mergeParallel or -mergeSerial option.
#COUPLING	inst	the coupling coefficient see K element.
$CTRL	inst	the name of the controlling element, see W, F or H element.
#GAIN	inst	gain value of controlling source.
#GUESSPWR	inst	probability whether the source is a power source used for power guessing.
$IC	inst	name of vsource in Eldo Y element.
$ICOMMENT	inst	inline comments, mentioned on the same line, if enabled with -icomment option.
$INITIAL	inst	Some elements can switch the initial condition to ON or OFF. In this case the instance attribute "$INITIAL=OFF" is created.
$INST1 .. $INSTn	inst	Instance names of all instances coupled by K element.
K	inst	couple coefficient for voltage controlled transformer vsources in HSpice and Eldo.
L	inst	unnamed attribute of L element.
MNAME	inst	model name of S element in HSpice.
MODEL	inst	model name of Eldo Y element.
$PARAM	inst	all parameters of voltage or current source, which are not parsed in detail.
PERI	inst	unnamed value of D element in CDL.
R	inst	unnamed or renamed 'VALUE' attribute of R element.
RON, CREC	inst	unnamed attribute of S element, in Eldo.
TC1, TC2	inst	Some elements have multiple TC values, which are split into these separate attributes.
#TRANS	inst	trans value of controlling source.
$TYPE	inst	type (2nd token) of Eldo Y element.
UMODEL RFGCFILE RLGCMODEL TABLEMODEL	inst	model name of W element in HSpice.
V1 I1 V2 I2	inst	split IC value of T element.
VBE VCE	inst	initial voltage of Q element.
VD	inst	initial voltage of D element.
VDS VGS	inst	initial voltage of J, Z element.
VDS VGS VBS	inst	initial voltage of M element.
#VOLTAGE	inst	the DC value of a independent vsource, used for power guessing.
W L	inst	unnamed values of D element, if there were two unnamed values.
W L	inst	unnamed values of J, M element, in CDL.
W L	inst	unnamed values of M element, sequence depends on .OPTION WL'.
LEN	inst	unnamed value of T element.
BULK	cell	default name of bulk net.
BV	cell	if value is less than 100 'D' model is treated as ZDiode.
$MODEL	cell	if there is a model specified, the parser creates a "$MODEL=model" cell attribute. This attribute is not created for builtin models like '_RES_'.
$SUBCKT	name	the parser creates a "$SUBCKT=name" attribute with the Spice sub-circuit name.
$NESTED	cell	For cells which are defined in .SUBCKT/.END blocks, the parser creates a "$NESTED=path" attribute.
$PREFIX	cell	prefix like "R" or "MN" used to identify the device function.
$TYPE	cell	model type like "NMOS", "D", "RES" etc. as mentioned in .MODEL.
@nlv	cell	attribute display information.
#GUESSPWR	net	probability of power guess.
#VOLTAGE	net	the guessed voltage of a power net.
$VSOURCE	net	instance name of voltage source of a power net.

Special attribute

Object

Description

AREA

inst

unnamed value of D, Q, J, B, Z, M element.

inst

unnamed or renamed 'VALUE' attribute of C element. Used to ignore small capacitors with -ignoreCaps option.

$CONSISTINGOF

inst

instance names of transistors merged by -mergeParallel or -mergeSerial option.

#COUPLING

inst

the coupling coefficient see K element.

$CTRL

inst

the name of the controlling element, see W, F or H element.

#GAIN

inst

gain value of controlling source.

#GUESSPWR

inst

probability whether the source is a power source used for power guessing.

$IC

inst

name of vsource in Eldo Y element.

$ICOMMENT

inst

inline comments, mentioned on the same line, if enabled with -icomment option.

$INITIAL

inst

Some elements can switch the initial condition to ON or OFF. In this case the instance attribute "$INITIAL=OFF" is created.

$INST1 .. $INSTn

inst

Instance names of all instances coupled by K element.

inst

couple coefficient for voltage controlled transformer vsources in HSpice and Eldo.

inst

unnamed attribute of L element.

MNAME

inst

model name of S element in HSpice.

MODEL

inst

model name of Eldo Y element.

$PARAM

inst

all parameters of voltage or current source, which are not parsed in detail.

PERI

inst

unnamed value of D element in CDL.

inst

unnamed or renamed 'VALUE' attribute of R element.

RON, CREC

inst

unnamed attribute of S element, in Eldo.

TC1, TC2

inst

Some elements have multiple TC values, which are split into these separate attributes.

#TRANS

inst

trans value of controlling source.

$TYPE

inst

type (2nd token) of Eldo Y element.

UMODEL
RFGCFILE
RLGCMODEL
TABLEMODEL

inst

model name of W element in HSpice.

V1
I1
V2
I2

inst

split IC value of T element.

VBE
VCE

inst

initial voltage of Q element.

inst

initial voltage of D element.

VDS
VGS

inst

initial voltage of J, Z element.

VDS
VGS
VBS

inst

initial voltage of M element.

#VOLTAGE

inst

the DC value of a independent vsource, used for power guessing.

W
L

inst

unnamed values of D element, if there were two unnamed values.

W
L

inst

unnamed values of J, M element, in CDL.

W
L

inst

unnamed values of M element, sequence depends on .OPTION WL'.

LEN

inst

unnamed value of T element.

BULK

cell

default name of bulk net.

cell

if value is less than 100 'D' model is treated as ZDiode.

$MODEL

cell

if there is a model specified, the parser creates a "$MODEL=model" cell attribute. This attribute is not created for builtin models like '_RES_'.

$SUBCKT

name

the parser creates a "$SUBCKT=name" attribute with the Spice sub-circuit name.

$NESTED

cell

For cells which are defined in .SUBCKT/.END blocks, the parser creates a "$NESTED=path" attribute.

$PREFIX

cell

prefix like "R" or "MN" used to identify the device function.

$TYPE

cell

model type like "NMOS", "D", "RES" etc. as mentioned in .MODEL.

@nlv

cell

attribute display information.

#GUESSPWR

net

probability of power guess.

#VOLTAGE

net

the guessed voltage of a power net.

$VSOURCE

net

instance name of voltage source of a power net.

What the Spice Post-Processing Does

Controlled by the options the following modifications on the database are done.

power nets and port directions user defined by options are set.
sub-circuits are expanded.
power nets and port directions are guessed. During this process "$VSOURCE" and "#VOLTAGE" attributes are added to the flagged power nets.
power ports get hidden.
small resistors are flagged to be removed and the connected nets get merged.
parallel capacitors are merged by changing "C" from the first instance to the sum of all. The other instances of each group are flagged for removal.
serial resistors are merged by changing "R" from the first instance to the sum of all. The other instances of the group are flagged for removal.
parallel transistors are merged by adding a new attribute "$CONSISTINGOF" to the first instance. All other instances of the group are flagged for removal.
serial transistors are merged by adding a new attribute "$CONSISTINGOF" to the first instance. All other instances of the group are flagged for removal.
during cleanup all flagged instances get deleted from the database.
new hierarchy is created if the instances names contain hierarchy separator characters.
the hide flag of bulk pins is set dependent on the option settings.

Limitations

The parser tries its best to read most of the input data. It is not a validating parser. This means that wrong input can produce unpredictable results instead of issuing an error or warning.

The following constructs are not implemented.

Spectre
- ahdl_include ignored
- CPP #include ignored
- OOM node references (with ".") treated like local nodes
- modelbinning attributes ignored
- spice3 ignored
- userdefined functions
- ignored keywords: altergroup, correlate, vary, export, for, function, ic, invisible, plot, print, return, save, sense, to, truncate, local, march, paramset, nodeset, pwr, statistics, sweep, montecarlo, reliability, ignored models, assert, bit, node, paramtest, pattern, quantity, ac, alter, check, checklimit, cosim, dc, dcmatch, envlp, hb, hbac, hbnoise, hbsp, info, loadpull, noise, options, pac, pdisto, pnoise, psp, pss, pstb, pxf, pz, qpac, qpnoise, qpsp, qpss, set, shell, sp, stb, stp, tdr, tran, uti, xf, analogmodel, bsource
- ignored models: analogmodel assert bit bsource node paramtest pattern quantity ac alter check checklimit cosim dc dcmatch envlp hb hbac hbnoise hbsp info loadpull noise options pac pdisto pnoise psp pss pstb pxf pz qpac qpnoise qpsp qpss set shell sp stb stp tdr tran uti xf
All dialects
- conditionals with if can only be evaluated, if the Boolean expression only contains constants or top-level parameters

Save Attributes to Spice Files

After database attributes have been modified in the database, zspice -save can be called to update (overwrite) the Spice source file. Only the instance attributes get updated — all other parts of the Spice file stay character-identical. This makes the resulting Spice file diff-able against the original one. The zspice -check command may be used to check if the modification with -save is possible.

zspice -save  $db
zspice -check $db file.spc

The option -save $db will save all modified attributes.

The option -check $db spicefile will check whether the Spice file exists and check several conditions to make sure, the Spice file is ok to get modified.

Here is an usage example that reads the Spice file buf.sp and adds a new instance attribute test=12 to each device (primitive) and sub-circuit (module) instance.

set db [zspice -hspice buf.sp]
$db foreach module module {
    $db foreach inst $module inst {
        $db attr $inst add test=12
    }
}
zspice -save $db