esd/testcase05.sp

 1
 2
 3
 4
 5
 6
 7
 8
 9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
* I/O Port Protection with NMOS and Resistor

.include "models.sp"

.subckt testcase05 PAD1_OK PAD2_BAD PAD3_BAD PAD4_BAD
* OK: pad, resistor, diode and gates
R1 PAD1_OK n2 100
M1 n2 GND GND GND nch
M2 VDD n2 n3 VDD pch
M3 n3 n2 GND GND nch

* BAD: pad, small resistor, diode and gates
R2 PAD2_BAD n4 10
M4 n4 GND GND GND nch
M5 VDD n4 n5 VDD pch
M6 n5 n4 GND GND nch

* BAD: pad, resistor, no diode and gates
R3 PAD3_BAD n6 100
M7 VDD n6 n7 VDD pch

* BAD: pad, no resistor, diode and gates
M8 PAD4_BAD GND GND GND nch
M9 VDD PAD4_BAD n8 VDD pch

.ends

.end