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241 | ###############################################################################
# Copyright (c) 2020-2024 by Altair Engineering, Inc.
# All rights reserved.
#
# Altair Engineering, Inc. makes this software available as part of the Vision
# tool platform. As long as you are a licensee of the Vision tool platform
# you may make copies of the software and modify it to be used within the
# Vision tool platform, but you must include all of this notice on any copy.
# Redistribution without written permission to any third party, with or
# without modification, is not permitted.
# Altair Engineering, Inc. does not warrant that this software is error free
# or fit for any purpose. Altair Engineering, Inc. disclaims any liability for
# all claims, expenses, losses, damages and costs any user may incur as a
# result of using, copying or modifying the software.
# =============================================================================
# @userware
# Report Clock Trees
# @section
# Create Reports
# @description
# Example Tcl script that uses ZDB API commands to get information about
# clock domains in a given design and print a report to an output file.
# Usage:
# starsh reportClockTrees.tcl design.zdb report.txt
# @files
# cust33/reportClockTrees.tcl
# @tag
# zdb batch report
###############################################################################
##
# Set patterns matching clocked cells, clock input ports and r_edge output
# port (this is the indicator for a clock divider cell).
#
set ReportClockTrees(clockedCellPattern) {
"DFF*" "C" ""
"*_divide*" "*clk*in" "r_edge"
}
# =============================================================================
# Start - Start reporting clock trees.
# =============================================================================
#
proc ReportClockTrees:Start {db report} {
##
# Pre-process all cells to flag clocked cells and clock divider cells.
#
ReportClockTrees:_flagClockedCells $db
##
# Open the report file.
#
set out [open $report "w"]
##
# Get the top design.
#
set top [$db get_top_design]
##
# Create a new CDC (clock domain analyzer) object.
#
set cdc [$db cdc new $top]
##
# Loop over the list of clock domains sorted by the number of clock pins.
#
foreach domainIdx [$cdc getDomainList -incr] {
##
# Get the clock source.
#
set clkSrc [$cdc getSrc $domainIdx]
##
# Skip input port clock sources.
#
if {[$db oid type $clkSrc] eq "port"} {
continue
}
##
# Get the instance and cell of the clock source.
#
set inst [$db oid convertTo inst $clkSrc]
set cell [$db down $inst]
##
# Skip cells without the 'red' flag (clock divider).
#
if {![$db flag $cell is red]} {
continue
}
##
# Find the r_edge output pin.
#
set r_edgeOutputPin {}
$db foreach pin $inst pin {
set port [$db oid convertTo port $pin]
if {[$db flag $port is red]} {
set r_edgeOutputPin $pin
break
}
}
##
# Print the clock divider instance and the r_edge output pin.
#
puts $out "CLK-DIVIDER: $inst => $r_edgeOutputPin"
}
##
# Free the CDC object.
#
$cdc free
##
# Close the report file.
#
close $out
}
# -----------------------------------------------------------------------------
# _flagClockedCells -
# -----------------------------------------------------------------------------
#
proc ReportClockTrees:_flagClockedCells {db} {
global ReportClockTrees
##
# Loop over all cells.
#
$db foreach cell cell {
##
# Clear the red flag at each cell.
#
$db flag $cell clear red
##
# Get the name of the cell.
#
set cellName [$db oid oname $cell]
##
# Loop over the clocked cell configuration.
#
foreach {
cellNamePattern
portNamePattern
r_edgeNamePattern
} $ReportClockTrees(clockedCellPattern) {
##
# Check if the cell name pattern matches this cell.
#
if {[string match $cellNamePattern $cellName]} {
##
# Set the clock flag at each matching cell.
#
$db flag $cell set clock
##
# Set the red flag to indicate a clock divider cell
# if the r_edge port name pattern is not empty.
#
if {$r_edgeNamePattern ne ""} {
$db flag $cell set red
}
##
# Loop over all ports of this cell.
#
$db foreach port $cell port {
##
# Clear the red flag at each port.
#
$db flag $port clear red
##
# Get the name of this port.
#
set portName [$db oid oname $port]
##
# Set the clock flag if this port name matches the clock
# port name pattern.
#
if {[string match $portNamePattern $portName]} {
$db flag $port set clock
}
##
# Set the red flag if this port name matches the r_edge
# port name pattern.
#
if {[string match $r_edgeNamePattern $portName]} {
$db flag $port set red
}
}
break
}
}
}
}
##
# Check for 2 command line options
#
if {$argc != 2} {
set msg "Wrong #of args. Usage:\n"
append msg "[info nameofexecutable] [info script] <BINFILE> <REPORTFILE>"
error $msg
}
##
# The design is given as the first argument on the command line.
#
set binfile [lindex $argv 0]
##
# The report file is the second argument on the command line.
#
set report [lindex $argv 1]
##
# Open the binfile.
#
set db [zdb open $binfile]
##
# Call the main procedure to start creating the report.
#
ReportClockTrees:Start $db $report
##
# Close the opened database.
#
$db close
|