WiredX
Wired node with multiple input and one output
Library
Modelica/Electrical/Digital/Tristates
Description
Wires n input signals in one output signal, without delay.
Resolution table is given by http://www.cs.sfu.ca/~ggbaker/reference/std_logic/src/std_logic_misc.vhd
Parameters
| Name | Label | Description | Data Type | Valid Values |
|---|---|---|---|---|
mo_n | n | Number of inputs | Scalar |
| Name | Label | Description | Data Type | Valid Values |
|---|---|---|---|---|
mo_x | x | x | Structure | |
mo_x/fixed | fixed | Cell of vectors | true | |
mo_x/start | start | Cell of vectors | ||
mo_y | y | y | Structure | |
mo_y/fixed | fixed | Cell of scalars | true | |
mo_y/start | start | Cell of scalars |
Ports
| Name | Type | Description | IO Type | Number |
|---|---|---|---|---|
x | implicit | Connector of Digital input signal vector | input | 1 |
y | implicit | Connector of Digital output signal | output | 1 |