ControlledRateLimiter

This block implements a rate limiter where the minimum and maximum rates are set by the first and third inputs, respectively.

    ControlledRateLimiter

Library

Activate/Hybrid

Description

This block implements a rate limiter where the minimum and maximum rates are set by the first and third inputs respectively.

Ports

NameTypeDescriptionIO TypeNumber

low

explicit

input

1

Port 2

explicit

input

2

Port 3

explicit

output

1

high

explicit

input

3

Advanced Properties

NameValueDescription

always active

standard

direct-feedthrough

yes

zero-crossing

no

mode

no

continuous-time state

no

discrete-time state

no

Diagram

ControlledRateLimiter

See Also